[llvm-commits] Patch: new backend for Hexagon processor

[Tony Linthicum]

On 11/28/2011 1:57 PM, Eli Friedman wrote:

> I just took another look; comments below.
>
>   void MCAsmStreamer::EmitCodeAlignment(unsigned ByteAlignment,
>                                         unsigned MaxBytesToEmit) {
> -  // Emit with a text fill value.
> -  EmitValueToAlignment(ByteAlignment, MAI.getTextAlignFillValue(),
> -                       1, MaxBytesToEmit);
> +  if (MAI.getCodeAlignDirective()) {
> +    OS<<  MAI.getCodeAlignDirective();
> +    EmitEOL();
> +  }
> +  else {
> +    // Emit with a text fill value.
> +    EmitValueToAlignment(ByteAlignment, MAI.getTextAlignFillValue(),
> +                         1, MaxBytesToEmit);
> +  }
>   }
>
> This doesn't actually appear to take into account the specified alignment.
>

This was an attempt to handle our ".falign" directive, which doesn't 
take an argument.  I discussed it with the guy that implemented it, and 
he feels that it needs a better implementation.  I've pulled the changes 
from the patch.  As a result, there are no more MC patches.

> +// This file contains a printer that converts from our internal representation
> +// of machine-dependent LLVM code to PowerPC assembly language. This printer is
>
> Copy-pasto?  References for PowerPC are scattered around HexagonAsmPrinter.cpp

Yep, cut and paste brain damage.  Fixed.

>
> +/// getFunctionAlignment - Return the Log2 alignment of this function.
> +unsigned HexagonTargetLowering::getFunctionAlignment(const Function *) const {
> +  return 2;
> +}
>
> This isn't overriding anything.  See
> setMinFunctionAlignment/setPrefFunctionAlignment.

Good catch.  Thanks.  Fixed.

>
> +def MUX_ri : ALU32_ri<(outs IntRegs:$dst), (ins PredRegs:$src1,
> IntRegs:$src2,
> s8Imm:$src3),
>
> 80 columns?
>

Ugh.  I spent a *lot* of time fixing 80 column overruns in the td files. 
  I guess I missed a few.  I think I got them all in that file now.

Tony

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
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