[llvm-commits] Initial patch for FMA4 support

[Jan Sjodin]

>>> There's no specific reason in this case to have the "Int" 

> forms:
>> 
>>> 
>>> +multiclass fma4s_Int<bits<8> opc, string OpcodeStr, Intrinsic 
> Int,
>>> +        PatFrag ld_frag> {
>>> ...
>>> +defm Int_VFMADDSD4  : fma4s_Int<0x6B, "vfmaddsd",
>>> int_x86_fma4_vfmadd_sd, alignedloadv2f64>;
>>> 
>>> Instead, just write patterns to match the intrinsics with the
>>> previously defined FMA4 instructions.
>> 
>> 
>>  Okay, will do.
>> 

I forgot to mention, the original reason why I did this was because I did not want to
write 3 patterns for each intrinsic, but I couldn't find another way to do it. In any case,
I do the pattern version, since it is probably safer to keep the encoding in one place.

e.g:

def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, VR128:$src2, VR128:$src3),
          (VFMADDSD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, VR128:$src2,
                                  (alignedloadv2f64 addr:$src3)),
          (VFMADDSD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, (alignedloadv2f64 addr:$src2),
                                  VR128:$src3),
          (VFMADDSD4mr VR128:$src1, addr:$src2, VR128:$src3)>;

- Jan