[llvm-commits] [llvm] r144665 - /llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp
Akira Hatanaka
ahatanaka at mips.com
Tue Nov 15 10:44:44 PST 2011
Author: ahatanak
Date: Tue Nov 15 12:44:44 2011
New Revision: 144665
URL: http://llvm.org/viewvc/llvm-project?rev=144665&view=rev
Log:
Set nomacro before emitting the sequence of instructions that set global pointer
register.
Modified:
llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp?rev=144665&r1=144664&r2=144665&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsFrameLowering.cpp Tue Nov 15 12:44:44 2011
@@ -169,13 +169,14 @@
MFI->setStackSize(StackSize);
BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
+ BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
// Emit instructions that set $gp using the the value of $t9.
// O32 uses the directive .cpload while N32/64 requires three instructions to
// do this.
// TODO: Do not emit these instructions if no instructions use $gp.
if (isPIC && STI.isABI_O32())
- BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
+ BuildMI(MBB, llvm::prior(MBBI), dl, TII.get(Mips::CPLOAD))
.addReg(RegInfo->getPICCallReg());
else if (STI.isABI_N64() || (isPIC && STI.isABI_N32())) {
// lui $28,%hi(%neg(%gp_rel(fname)))
@@ -189,8 +190,6 @@
.addGlobalAddress(FName, 0, MipsII::MO_GPOFF_LO);
}
- BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
-
// No need to allocate space on the stack.
if (StackSize == 0 && !MFI->adjustsStack()) return;
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