[llvm-commits] [llvm] r144547 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/ARM/2011-11-14-EarlyClobber.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Mon Nov 14 10:45:39 PST 2011
Author: stoklund
Date: Mon Nov 14 12:45:38 2011
New Revision: 144547
URL: http://llvm.org/viewvc/llvm-project?rev=144547&view=rev
Log:
Fix early-clobber handling in shrinkToUses.
I broke this in r144515, it affected most ARM testers.
<rdar://problem/10441389>
Added:
llvm/trunk/test/CodeGen/ARM/2011-11-14-EarlyClobber.ll
Modified:
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=144547&r1=144546&r2=144547&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Nov 14 12:45:38 2011
@@ -659,7 +659,9 @@
if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
continue;
SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
- VNInfo *VNI = li->getVNInfoAt(Idx.getBaseIndex());
+ // Note: This intentionally picks up the wrong VNI in case of an EC redef.
+ // See below.
+ VNInfo *VNI = li->getVNInfoBefore(Idx);
if (!VNI) {
// This shouldn't happen: readsVirtualRegister returns true, but there is
// no live value. It is likely caused by a target getting <undef> flags
@@ -669,10 +671,11 @@
<< *li << '\n');
continue;
}
- if (VNI->def == Idx.getRegSlot(true)) {
- // Special case: An early-clobber tied operand reads and writes the
- // register one slot early.
- Idx = Idx.getRegSlot(true);
+ // Special case: An early-clobber tied operand reads and writes the
+ // register one slot early. The getVNInfoBefore call above would have
+ // picked up the value defined by UseMI. Adjust the kill slot and value.
+ if (SlotIndex::isSameInstr(VNI->def, Idx)) {
+ Idx = VNI->def;
VNI = li->getVNInfoBefore(Idx);
assert(VNI && "Early-clobber tied value not available");
}
@@ -687,13 +690,6 @@
if (VNI->isUnused())
continue;
NewLI.addRange(LiveRange(VNI->def, VNI->def.getDeadSlot(), VNI));
-
- // A use tied to an early-clobber def ends at the load slot and isn't caught
- // above. Catch it here instead. This probably only ever happens for inline
- // assembly.
- if (VNI->def.isEarlyClobber())
- if (VNInfo *UVNI = li->getVNInfoBefore(VNI->def))
- WorkList.push_back(std::make_pair(VNI->def, UVNI));
}
// Keep track of the PHIs that are in use.
Added: llvm/trunk/test/CodeGen/ARM/2011-11-14-EarlyClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-11-14-EarlyClobber.ll?rev=144547&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-11-14-EarlyClobber.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2011-11-14-EarlyClobber.ll Mon Nov 14 12:45:38 2011
@@ -0,0 +1,62 @@
+; RUN: llc < %s -mcpu=cortex-a8 -verify-regalloc
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
+target triple = "thumbv7-apple-ios"
+
+; This test calls shrinkToUses with an early-clobber redefined live range during
+; spilling.
+;
+; Shrink: %vreg47,1.158257e-02 = [384r,400e:0)[400e,420r:1) 0 at 384r 1 at 400e
+;
+; The early-clobber instruction is an str:
+;
+; %vreg12<earlyclobber,def> = t2STR_PRE %vreg6, %vreg12, 32, pred:14, pred:%noreg
+;
+; This tests that shrinkToUses handles the EC redef correctly.
+
+%struct.Transform_Struct.0.11.12.17.43.46.56.58.60 = type { [4 x [4 x double]] }
+
+define void @Compute_Axis_Rotation_Transform(%struct.Transform_Struct.0.11.12.17.43.46.56.58.60* nocapture %transform, double* nocapture %V1, double %angle) nounwind {
+entry:
+ store double 1.000000e+00, double* null, align 4
+ %arrayidx5.1.i = getelementptr inbounds %struct.Transform_Struct.0.11.12.17.43.46.56.58.60* %transform, i32 0, i32 0, i32 0, i32 1
+ store double 0.000000e+00, double* %arrayidx5.1.i, align 4
+ %arrayidx5.2.i = getelementptr inbounds %struct.Transform_Struct.0.11.12.17.43.46.56.58.60* %transform, i32 0, i32 0, i32 0, i32 2
+ store double 0.000000e+00, double* %arrayidx5.2.i, align 4
+ %arrayidx5.114.i = getelementptr inbounds %struct.Transform_Struct.0.11.12.17.43.46.56.58.60* %transform, i32 0, i32 0, i32 1, i32 0
+ store double 0.000000e+00, double* %arrayidx5.114.i, align 4
+ %arrayidx5.1.1.i = getelementptr inbounds %struct.Transform_Struct.0.11.12.17.43.46.56.58.60* %transform, i32 0, i32 0, i32 1, i32 1
+ store double 1.000000e+00, double* %arrayidx5.1.1.i, align 4
+ store double 0.000000e+00, double* null, align 4
+ store double 1.000000e+00, double* null, align 4
+ store double 0.000000e+00, double* null, align 4
+ %call = tail call double @cos(double %angle) nounwind readnone
+ %call1 = tail call double @sin(double %angle) nounwind readnone
+ %0 = load double* %V1, align 4
+ %arrayidx2 = getelementptr inbounds double* %V1, i32 1
+ %1 = load double* %arrayidx2, align 4
+ %mul = fmul double %0, %1
+ %sub = fsub double 1.000000e+00, %call
+ %mul3 = fmul double %mul, %sub
+ %2 = load double* undef, align 4
+ %mul5 = fmul double %2, %call1
+ %add = fadd double %mul3, %mul5
+ store double %add, double* %arrayidx5.1.i, align 4
+ %3 = load double* %V1, align 4
+ %mul11 = fmul double %3, undef
+ %mul13 = fmul double %mul11, %sub
+ %4 = load double* %arrayidx2, align 4
+ %mul15 = fmul double %4, %call1
+ %sub16 = fsub double %mul13, %mul15
+ store double %sub16, double* %arrayidx5.2.i, align 4
+ %5 = load double* %V1, align 4
+ %6 = load double* %arrayidx2, align 4
+ %mul22 = fmul double %5, %6
+ %mul24 = fmul double %mul22, %sub
+ %sub27 = fsub double %mul24, undef
+ store double %sub27, double* %arrayidx5.114.i, align 4
+ ret void
+}
+
+declare double @cos(double) nounwind readnone
+
+declare double @sin(double) nounwind readnone
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