[llvm-commits] [llvm] r144494 - in /llvm/trunk: lib/Target/ARM/ARMFastISel.cpp test/CodeGen/ARM/fast-isel-intrinsic.ll

[Chad Rosier]

Author: mcrosier
Date: Sun Nov 13 03:44:21 2011
New Revision: 144494

URL: http://llvm.org/viewvc/llvm-project?rev=144494&view=rev
Log:
The order in which the predicate is added differs between Thumb and ARM mode.  Fix predicate when in ARM mode and restore SelectIntrinsicCall.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
    llvm/trunk/test/CodeGen/ARM/fast-isel-intrinsic.ll

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=144494&r1=144493&r2=144494&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Sun Nov 13 03:44:21 2011
@@ -2108,18 +2108,25 @@
   MachineInstrBuilder MIB;
   unsigned CallOpc = ARMSelectCallOp(GV);
   // Explicitly adding the predicate here.
-  if(isThumb2)
+  if(isThumb2) {
     // Explicitly adding the predicate here.
     MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
                                  TII.get(CallOpc)));
-  else
-    // Explicitly adding the predicate here.
-    MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
-                                 TII.get(CallOpc)));
-  if (!IntrMemName)
-    MIB.addGlobalAddress(GV, 0, 0);
-  else 
-    MIB.addExternalSymbol(IntrMemName, 0);
+    if (!IntrMemName)
+      MIB.addGlobalAddress(GV, 0, 0);
+    else 
+      MIB.addExternalSymbol(IntrMemName, 0);
+  } else {
+    if (!IntrMemName)
+      // Explicitly adding the predicate here.
+      MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                                   TII.get(CallOpc))
+            .addGlobalAddress(GV, 0, 0));
+    else
+      MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                                   TII.get(CallOpc))
+            .addExternalSymbol(IntrMemName, 0));
+  }
   
   // Add implicit physical register uses to the call.
   for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
@@ -2136,7 +2143,6 @@
 }
 
 bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) {
-  if (!isThumb2) return false;
   // FIXME: Handle more intrinsics.
   switch (I.getIntrinsicID()) {
   default: return false;

Modified: llvm/trunk/test/CodeGen/ARM/fast-isel-intrinsic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-intrinsic.ll?rev=144494&r1=144493&r2=144494&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel-intrinsic.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel-intrinsic.ll Sun Nov 13 03:44:21 2011
@@ -1,3 +1,4 @@
+; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
 
 @message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
@@ -10,7 +11,7 @@
 ; ARM: movw r1, #64
 ; ARM: movw r2, #10
 ; ARM: uxtb r1, r1
-; ARM: bl #14
+; ARM: bl _memset
 ; THUMB: t1
 ; THUMB: ldr.n r0, LCPI0_0
 ; THUMB: adds r0, #5
@@ -36,7 +37,7 @@
 ; ARM: str r0, [sp]                @ 4-byte Spill
 ; ARM: mov r0, r1
 ; ARM: ldr r1, [sp]                @ 4-byte Reload
-; ARM: bl #14
+; ARM: bl _memcpy
 ; THUMB: t2
 ; THUMB: ldr.n r0, LCPI1_0
 ; THUMB: ldr r0, [r0]
@@ -60,7 +61,7 @@
 ; ARM: add r0, r0, #16
 ; ARM: movw r2, #10
 ; ARM: mov r0, r1
-; ARM: bl #14
+; ARM: bl _memmove
 ; THUMB: t3
 ; THUMB: ldr.n r0, LCPI2_0
 ; THUMB: ldr r0, [r0]