[llvm-commits] [llvm] r144154 - in /llvm/trunk/lib/Target/ARM: ARMLoadStoreOptimizer.cpp ARMSubtarget.h

[Evan Cheng]

Author: evancheng
Date: Tue Nov  8 19:57:03 2011
New Revision: 144154

URL: http://llvm.org/viewvc/llvm-project?rev=144154&view=rev
Log:
Hide cpu name checking in ARMSubtarget.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=144154&r1=144153&r2=144154&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Nov  8 19:57:03 2011
@@ -1080,7 +1080,7 @@
     unsigned OddRegNum  = TRI->getDwarfRegNum(OddReg, false);
     // ARM errata 602117: LDRD with base in list may result in incorrect base
     // register when interrupted or faulted.
-    bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3";
+    bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3();
     if (!Errata602117 &&
         ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum))
       return false;

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=144154&r1=144153&r2=144154&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Tue Nov  8 19:57:03 2011
@@ -191,6 +191,7 @@
 
   bool isCortexA8() const { return ARMProcFamily == CortexA8; }
   bool isCortexA9() const { return ARMProcFamily == CortexA9; }
+  bool isCortexM3() const { return CPUString == "cortex-m3"; }
 
   bool hasARMOps() const { return !NoARM; }