[llvm-commits] [llvm] r144123 - in /llvm/trunk: lib/Target/ARM/ARMLoadStoreOptimizer.cpp test/CodeGen/ARM/ldrd.ll

Evan Cheng evan.cheng at apple.com
Tue Nov 8 14:15:25 PST 2011


On Nov 8, 2011, at 2:03 PM, Eli Friedman wrote:

> On Tue, Nov 8, 2011 at 1:21 PM, Evan Cheng <evan.cheng at apple.com> wrote:
>> Author: evancheng
>> Date: Tue Nov  8 15:21:09 2011
>> New Revision: 144123
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=144123&view=rev
>> Log:
>> Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs.
>> 
>> Modified:
>>    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>>    llvm/trunk/test/CodeGen/ARM/ldrd.ll
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=144123&r1=144122&r2=144123&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Nov  8 15:21:09 2011
>> @@ -62,6 +62,7 @@
>> 
>>     const TargetInstrInfo *TII;
>>     const TargetRegisterInfo *TRI;
>> +    const ARMSubtarget *STI;
>>     ARMFunctionInfo *AFI;
>>     RegScavenger *RS;
>>     bool isThumb2;
>> @@ -1071,11 +1072,17 @@
>>   unsigned Opcode = MI->getOpcode();
>>   if (Opcode == ARM::LDRD || Opcode == ARM::STRD ||
>>       Opcode == ARM::t2LDRDi8 || Opcode == ARM::t2STRDi8) {
>> +    const MachineOperand &BaseOp = MI->getOperand(2);
>> +    unsigned BaseReg = BaseOp.getReg();
>>     unsigned EvenReg = MI->getOperand(0).getReg();
>>     unsigned OddReg  = MI->getOperand(1).getReg();
>>     unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false);
>>     unsigned OddRegNum  = TRI->getDwarfRegNum(OddReg, false);
>> -    if ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum)
>> +    // ARM errata 602117: LDRD with base in list may result in incorrect base
>> +    // register when interrupted or faulted.
>> +    bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3";
> 
> Err, checking getCPUString() seems like a hack; shouldn't this be a
> subtarget feature?

That would make sense if this particular cpu has more than one subtarget features. As it is, I don't see the point. We're using a lot of subtarget bits already.

Evan

> 
> -Eli




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