[llvm-commits] [llvm] r143177 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/CellSPU/ test/CodeGen/Mips/ test/CodeGen/Thumb/ test/CodeGen/X86/

[Eli Friedman]

On Thu, Oct 27, 2011 at 6:29 PM, Dan Gohman <gohman at apple.com> wrote:
> @@ -3628,6 +3351,35 @@
>     Results.push_back(Tmp1);
>     break;
>   }
> +  case ISD::BUILD_VECTOR:
> +    Results.push_back(ExpandBUILD_VECTOR(Node));
> +    break;
> +  case ISD::SRA:
> +  case ISD::SRL:
> +  case ISD::SHL: {
> +    // Scalarize vector SRA/SRL/SHL.
> +    EVT VT = Node->getValueType(0);
> +    assert(VT.isVector() && "Unable to legalize non-vector shift");
> +    assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be legal");
> +    unsigned NumElem = VT.getVectorNumElements();
> +
> +    SmallVector<SDValue, 8> Scalars;
> +    for (unsigned Idx = 0; Idx < NumElem; Idx++) {
> +      SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
> +                               VT.getScalarType(),
> +                               Node->getOperand(0), DAG.getIntPtrConstant(Idx));
> +      SDValue Sh = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
> +                               VT.getScalarType(),
> +                               Node->getOperand(1), DAG.getIntPtrConstant(Idx));
> +      Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
> +                                    VT.getScalarType(), Ex, Sh));
> +    }
> +    SDValue Result =
> +      DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0),
> +                  &Scalars[0], Scalars.size());
> +    DAG.ReplaceAllUsesWith(SDValue(Node, 0), Result, this);
> +    break;
> +  }

We ought to be scalarizing vector shifts in LegalizeVectorOps; is
there some case where that is not sufficient?

-Eli