[llvm-commits] [llvm] r143112 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrSystem.td test/MC/X86/x86-32-coverage.s test/MC/X86/x86-64.s test/MC/X86/x86_errors.s
Kevin Enderby
enderby at apple.com
Thu Oct 27 10:40:42 PDT 2011
Author: enderby
Date: Thu Oct 27 12:40:41 2011
New Revision: 143112
URL: http://llvm.org/viewvc/llvm-project?rev=143112&view=rev
Log:
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
not depend on In32BitMode. Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode. rdar://9738584
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrSystem.td
llvm/trunk/test/MC/X86/x86-32-coverage.s
llvm/trunk/test/MC/X86/x86-64.s
llvm/trunk/test/MC/X86/x86_errors.s
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=143112&r1=143111&r2=143112&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Oct 27 12:40:41 2011
@@ -1573,6 +1573,7 @@
// System instruction aliases.
def : MnemonicAlias<"iret", "iretl">;
def : MnemonicAlias<"sysret", "sysretl">;
+def : MnemonicAlias<"sysexit", "sysexitl">;
def : MnemonicAlias<"lgdtl", "lgdt">, Requires<[In32BitMode]>;
def : MnemonicAlias<"lgdtq", "lgdt">, Requires<[In64BitMode]>;
Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=143112&r1=143111&r2=143112&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Thu Oct 27 12:40:41 2011
@@ -51,9 +51,8 @@
def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", []>, TB;
-def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexit", []>, TB,
- Requires<[In32BitMode]>;
-def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexit", []>, TB,
+def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexitl", []>, TB;
+def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iretw", []>, OpSize;
Modified: llvm/trunk/test/MC/X86/x86-32-coverage.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=143112&r1=143111&r2=143112&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32-coverage.s (original)
+++ llvm/trunk/test/MC/X86/x86-32-coverage.s Thu Oct 27 12:40:41 2011
@@ -500,6 +500,9 @@
// CHECK: sysexit
sysexit
+// CHECK: sysexitl
+ sysexitl
+
// CHECK: ud2
ud2
@@ -4417,6 +4420,10 @@
// CHECK: encoding: [0x0f,0x35]
sysexit
+// CHECK: sysexitl
+// CHECK: encoding: [0x0f,0x35]
+ sysexitl
+
// CHECK: fxsave 3735928559(%ebx,%ecx,8)
// CHECK: encoding: [0x0f,0xae,0x84,0xcb,0xef,0xbe,0xad,0xde]
fxsave 0xdeadbeef(%ebx,%ecx,8)
Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=143112&r1=143111&r2=143112&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Thu Oct 27 12:40:41 2011
@@ -1191,3 +1191,15 @@
// CHECK: xchgl %ecx, %eax
// CHECK: encoding: [0x91]
xchgl %eax, %ecx
+
+// CHECK: sysexit
+// CHECK: encoding: [0x0f,0x35]
+sysexit
+
+// CHECK: sysexitl
+// CHECK: encoding: [0x0f,0x35]
+sysexitl
+
+// CHECK: sysexitq
+// CHECK: encoding: [0x48,0x0f,0x35]
+sysexitq
Modified: llvm/trunk/test/MC/X86/x86_errors.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_errors.s?rev=143112&r1=143111&r2=143112&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86_errors.s (original)
+++ llvm/trunk/test/MC/X86/x86_errors.s Thu Oct 27 12:40:41 2011
@@ -18,3 +18,5 @@
movl 0(%rax), 0(%edx) // error: invalid operand for instruction
+// 32: error: instruction requires a CPU feature not currently enabled
+sysexitq
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