[llvm-commits] [llvm] r142880 - in /llvm/trunk: CMakeLists.txt autoconf/configure.ac configure docs/CodeGenerator.html docs/ReleaseNotes.html include/llvm/ADT/Triple.h lib/Support/Triple.cpp lib/Target/Blackfin/ projects/sample/autoconf/configure.ac projects/sample/configure test/CodeGen/Blackfin/ utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp
Dan Gohman
gohman at apple.com
Mon Oct 24 17:05:43 PDT 2011
Author: djg
Date: Mon Oct 24 19:05:42 2011
New Revision: 142880
URL: http://llvm.org/viewvc/llvm-project?rev=142880&view=rev
Log:
Remove the Blackfin backend.
Removed:
llvm/trunk/lib/Target/Blackfin/
llvm/trunk/test/CodeGen/Blackfin/
Modified:
llvm/trunk/CMakeLists.txt
llvm/trunk/autoconf/configure.ac
llvm/trunk/configure
llvm/trunk/docs/CodeGenerator.html
llvm/trunk/docs/ReleaseNotes.html
llvm/trunk/include/llvm/ADT/Triple.h
llvm/trunk/lib/Support/Triple.cpp
llvm/trunk/projects/sample/autoconf/configure.ac
llvm/trunk/projects/sample/configure
llvm/trunk/utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp
llvm/trunk/utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp
Modified: llvm/trunk/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/CMakeLists.txt (original)
+++ llvm/trunk/CMakeLists.txt Mon Oct 24 19:05:42 2011
@@ -66,7 +66,6 @@
set(LLVM_ALL_TARGETS
Alpha
ARM
- Blackfin
CBackend
CellSPU
CppBackend
Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Mon Oct 24 19:05:42 2011
@@ -357,7 +357,6 @@
mips-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
- bfin-*) llvm_cv_target_arch="Blackfin" ;;
mblaze-*) llvm_cv_target_arch="MBlaze" ;;
ptx-*) llvm_cv_target_arch="PTX" ;;
*) llvm_cv_target_arch="Unknown" ;;
@@ -493,7 +492,6 @@
Mips) AC_SUBST(TARGET_HAS_JIT,1) ;;
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
- Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;;
MBlaze) AC_SUBST(TARGET_HAS_JIT,0) ;;
PTX) AC_SUBST(TARGET_HAS_JIT,0) ;;
*) AC_SUBST(TARGET_HAS_JIT,0) ;;
@@ -606,13 +604,13 @@
AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
[Build specific host targets: all or target1,target2,... Valid targets are:
host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu,
- xcore, msp430, blackfin, ptx, cbe, and cpp (default=all)]),,
+ xcore, msp430, ptx, cbe, and cpp (default=all)]),,
enableval=all)
if test "$enableval" = host-only ; then
enableval=host
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 Blackfin CBackend CppBackend MBlaze PTX" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;;
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
case "$a_target" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -625,7 +623,6 @@
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
@@ -642,7 +639,6 @@
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- Blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;;
*) AC_MSG_ERROR([Can not set target to build]) ;;
esac ;;
Modified: llvm/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Mon Oct 24 19:05:42 2011
@@ -1416,7 +1416,7 @@
--enable-targets Build specific host targets: all or
target1,target2,... Valid targets are: host, x86,
x86_64, sparc, powerpc, alpha, arm, mips, spu,
- xcore, msp430, blackfin, ptx, cbe, and cpp
+ xcore, msp430, ptx, cbe, and cpp
(default=all)
--enable-cbe-printf-a Enable C Backend output with hex floating point via
%a (default is YES)
@@ -3880,7 +3880,6 @@
mips-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
- bfin-*) llvm_cv_target_arch="Blackfin" ;;
mblaze-*) llvm_cv_target_arch="MBlaze" ;;
ptx-*) llvm_cv_target_arch="PTX" ;;
*) llvm_cv_target_arch="Unknown" ;;
@@ -5287,7 +5286,6 @@
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
Modified: llvm/trunk/docs/CodeGenerator.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.html (original)
+++ llvm/trunk/docs/CodeGenerator.html Mon Oct 24 19:05:42 2011
@@ -2209,7 +2209,6 @@
<th>Feature</th>
<th>ARM</th>
<th>Alpha</th>
- <th>Blackfin</th>
<th>CellSPU</th>
<th>MBlaze</th>
<th>MSP430</th>
@@ -2225,7 +2224,6 @@
<td><a href="#feat_reliable">is generally reliable</a></td>
<td class="yes"></td> <!-- ARM -->
<td class="unknown"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="no"></td> <!-- MBlaze -->
<td class="unknown"></td> <!-- MSP430 -->
@@ -2241,7 +2239,6 @@
<td><a href="#feat_asmparser">assembly parser</a></td>
<td class="no"></td> <!-- ARM -->
<td class="no"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="yes"></td> <!-- MBlaze -->
<td class="no"></td> <!-- MSP430 -->
@@ -2257,7 +2254,6 @@
<td><a href="#feat_disassembler">disassembler</a></td>
<td class="yes"></td> <!-- ARM -->
<td class="no"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="yes"></td> <!-- MBlaze -->
<td class="no"></td> <!-- MSP430 -->
@@ -2273,7 +2269,6 @@
<td><a href="#feat_inlineasm">inline asm</a></td>
<td class="yes"></td> <!-- ARM -->
<td class="unknown"></td> <!-- Alpha -->
- <td class="yes"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="yes"></td> <!-- MBlaze -->
<td class="unknown"></td> <!-- MSP430 -->
@@ -2289,7 +2284,6 @@
<td><a href="#feat_jit">jit</a></td>
<td class="partial"><a href="#feat_jit_arm">*</a></td> <!-- ARM -->
<td class="no"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="no"></td> <!-- MBlaze -->
<td class="unknown"></td> <!-- MSP430 -->
@@ -2305,7 +2299,6 @@
<td><a href="#feat_objectwrite">.o file writing</a></td>
<td class="no"></td> <!-- ARM -->
<td class="no"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="yes"></td> <!-- MBlaze -->
<td class="no"></td> <!-- MSP430 -->
@@ -2321,7 +2314,6 @@
<td><a href="#feat_tailcall">tail calls</a></td>
<td class="yes"></td> <!-- ARM -->
<td class="unknown"></td> <!-- Alpha -->
- <td class="no"></td> <!-- Blackfin -->
<td class="no"></td> <!-- CellSPU -->
<td class="no"></td> <!-- MBlaze -->
<td class="unknown"></td> <!-- MSP430 -->
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 24 19:05:42 2011
@@ -759,7 +759,7 @@
href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVMdev list</a>.</p>
<ul>
-<li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PTX,
+<li>The Alpha, CellSPU, MicroBlaze, MSP430, MIPS, PTX,
and XCore backends are experimental.</li>
<li><tt>llc</tt> "<tt>-filetype=obj</tt>" is experimental on all targets
other than darwin and ELF X86 systems.</li>
Modified: llvm/trunk/include/llvm/ADT/Triple.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/Triple.h (original)
+++ llvm/trunk/include/llvm/ADT/Triple.h Mon Oct 24 19:05:42 2011
@@ -45,7 +45,6 @@
alpha, // Alpha: alpha
arm, // ARM; arm, armv.*, xscale
- bfin, // Blackfin: bfin
cellspu, // CellSPU: spu, cellspu
mips, // MIPS: mips, mipsallegrex
mipsel, // MIPSEL: mipsel, mipsallegrexel, psp
Modified: llvm/trunk/lib/Support/Triple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Triple.cpp (original)
+++ llvm/trunk/lib/Support/Triple.cpp Mon Oct 24 19:05:42 2011
@@ -20,7 +20,6 @@
case alpha: return "alpha";
case arm: return "arm";
- case bfin: return "bfin";
case cellspu: return "cellspu";
case mips: return "mips";
case mipsel: return "mipsel";
@@ -56,8 +55,6 @@
case arm:
case thumb: return "arm";
- case bfin: return "bfin";
-
case cellspu: return "spu";
case ppc64:
@@ -138,8 +135,6 @@
return alpha;
if (Name == "arm")
return arm;
- if (Name == "bfin")
- return bfin;
if (Name == "cellspu")
return cellspu;
if (Name == "mips")
@@ -278,8 +273,6 @@
return x86;
else if (ArchName == "amd64" || ArchName == "x86_64")
return x86_64;
- else if (ArchName == "bfin")
- return bfin;
else if (ArchName == "powerpc")
return ppc;
else if ((ArchName == "powerpc64") || (ArchName == "ppu"))
Modified: llvm/trunk/projects/sample/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/projects/sample/autoconf/configure.ac?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/projects/sample/autoconf/configure.ac (original)
+++ llvm/trunk/projects/sample/autoconf/configure.ac Mon Oct 24 19:05:42 2011
@@ -301,7 +301,6 @@
mips-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
- bfin-*) llvm_cv_target_arch="Blackfin" ;;
mblaze-*) llvm_cv_target_arch="MBlaze" ;;
ptx-*) llvm_cv_target_arch="PTX" ;;
*) llvm_cv_target_arch="Unknown" ;;
@@ -437,7 +436,6 @@
Mips) AC_SUBST(TARGET_HAS_JIT,1) ;;
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
- Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;;
MBlaze) AC_SUBST(TARGET_HAS_JIT,0) ;;
PTX) AC_SUBST(TARGET_HAS_JIT,0) ;;
*) AC_SUBST(TARGET_HAS_JIT,0) ;;
@@ -550,13 +548,13 @@
AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
[Build specific host targets: all or target1,target2,... Valid targets are:
host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu,
- xcore, msp430, blackfin, ptx, cbe, and cpp (default=all)]),,
+ xcore, msp430, ptx, cbe, and cpp (default=all)]),,
enableval=all)
if test "$enableval" = host-only ; then
enableval=host
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 Blackfin CBackend CppBackend MBlaze PTX" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;;
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
case "$a_target" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -569,7 +567,6 @@
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
@@ -586,7 +583,6 @@
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- Blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;;
*) AC_MSG_ERROR([Can not set target to build]) ;;
esac ;;
Modified: llvm/trunk/projects/sample/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/projects/sample/configure?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/projects/sample/configure (original)
+++ llvm/trunk/projects/sample/configure Mon Oct 24 19:05:42 2011
@@ -1402,7 +1402,7 @@
--enable-targets Build specific host targets: all or
target1,target2,... Valid targets are: host, x86,
x86_64, sparc, powerpc, alpha, arm, mips, spu,
- xcore, msp430, blackfin, ptx, cbe, and cpp
+ xcore, msp430, ptx, cbe, and cpp
(default=all)
--enable-cbe-printf-a Enable C Backend output with hex floating point via
%a (default is YES)
@@ -3845,7 +3845,6 @@
mips-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
- bfin-*) llvm_cv_target_arch="Blackfin" ;;
mblaze-*) llvm_cv_target_arch="MBlaze" ;;
ptx-*) llvm_cv_target_arch="PTX" ;;
*) llvm_cv_target_arch="Unknown" ;;
@@ -5049,8 +5048,6 @@
;;
MSP430) TARGET_HAS_JIT=0
;;
- Blackfin) TARGET_HAS_JIT=0
- ;;
MBlaze) TARGET_HAS_JIT=0
;;
PTX) TARGET_HAS_JIT=0
@@ -5239,7 +5236,7 @@
enableval=host
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 Blackfin CBackend CppBackend MBlaze PTX" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;;
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
case "$a_target" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -5252,7 +5249,6 @@
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
@@ -5269,7 +5265,6 @@
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- Blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;;
*) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5
echo "$as_me: error: Can not set target to build" >&2;}
Modified: llvm/trunk/utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp (original)
+++ llvm/trunk/utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp Mon Oct 24 19:05:42 2011
@@ -2,7 +2,7 @@
# Do not edit here. If you wish to override these values
# edit the last section
set target_triplet "x86_64-apple-darwin10"
-set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 Blackfin CBackend MSIL CppBackend"
+set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend"
set llvmgcc_langs "c,c++,objc,obj-c++"
set prcontext "/usr/bin/tclsh8.4 /Volumes/Data/ddunbar/llvm/test/Scripts/prcontext.tcl"
set llvmtoolsdir "/Users/ddunbar/llvm.obj.64/Debug/bin"
Modified: llvm/trunk/utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp?rev=142880&r1=142879&r2=142880&view=diff
==============================================================================
--- llvm/trunk/utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp (original)
+++ llvm/trunk/utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp Mon Oct 24 19:05:42 2011
@@ -2,7 +2,7 @@
# Do not edit here. If you wish to override these values
# edit the last section
set target_triplet "x86_64-apple-darwin10"
-set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 Blackfin CBackend MSIL CppBackend"
+set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend"
set llvmgcc_langs "c,c++,objc,obj-c++"
set prcontext "/usr/bin/tclsh8.4 /Volumes/Data/ddunbar/llvm/test/Scripts/prcontext.tcl"
set llvmtoolsdir "/Users/ddunbar/llvm.obj.64/Debug/bin"
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