[llvm-commits] [llvm] r142624 - in /llvm/trunk/test/MC/Disassembler/ARM: arm-tests.txt basic-arm-instructions.txt

[Owen Anderson]

Author: resistor
Date: Thu Oct 20 17:01:48 2011
New Revision: 142624

URL: http://llvm.org/viewvc/llvm-project?rev=142624&view=rev
Log:
Fix decoding tests for fixed MSR encodings.

Modified:
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
    llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=142624&r1=142623&r2=142624&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Thu Oct 20 17:01:48 2011
@@ -161,12 +161,6 @@
 # CHECK: cpsie if, #10
 0xca 0x00 0x0a 0xf1
 
-# CHECK: msr CPSR_fc, r0
-0x00 0xf0 0x29 0xe1
-
-# CHECK:	msrmi	CPSR_c, #4043309056
-0xf1 0xf4 0x21 0x43
-
 # CHECK: rsbs r6, r7, r8
 0x08 0x60 0x77 0xe0
 

Modified: llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt?rev=142624&r1=142623&r2=142624&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt Thu Oct 20 17:01:48 2011
@@ -744,65 +744,21 @@
 # MSR
 #------------------------------------------------------------------------------
 
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  APSR_g, #5
-# CHECK: msr  APSR_nzcvq, #5
-# CHECK: msr  APSR_nzcvq, #5
-# CHECK: msr  APSR_nzcvqg, #5
-# CHECK: msr  CPSR_fc, #5
 # CHECK: msr  CPSR_c, #5
 # CHECK: msr  CPSR_x, #5
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  CPSR_fsx, #5
-# CHECK: msr  SPSR_fc, #5
-# CHECK: msr  SPSR_fsxc, #5
-# CHECK: msr  CPSR_fsxc, #5
+# CHECK: msr  CPSR_xc, #5
 
-0x05 0xf0 0x29 0xe3
 0x05 0xf0 0x24 0xe3
 0x05 0xf0 0x28 0xe3
-0x05 0xf0 0x28 0xe3
 0x05 0xf0 0x2c 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x21 0xe3
-0x05 0xf0 0x22 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x2e 0xe3
-0x05 0xf0 0x69 0xe3
-0x05 0xf0 0x6f 0xe3
-0x05 0xf0 0x2f 0xe3
-
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  APSR_g, r0
-# CHECK: msr  APSR_nzcvq, r0
-# CHECK: msr  APSR_nzcvq, r0
-# CHECK: msr  APSR_nzcvqg, r0
-# CHECK: msr  CPSR_fc, r0
+
 # CHECK: msr  CPSR_c, r0
 # CHECK: msr  CPSR_x, r0
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  CPSR_fsx, r0
-# CHECK: msr  SPSR_fc, r0
-# CHECK: msr  SPSR_fsxc, r0
-# CHECK: msr  CPSR_fsxc, r0
+# CHECK: msr  CPSR_xc, r0
 
-0x00 0xf0 0x29 0xe1
 0x00 0xf0 0x24 0xe1
 0x00 0xf0 0x28 0xe1
-0x00 0xf0 0x28 0xe1
 0x00 0xf0 0x2c 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x21 0xe1
-0x00 0xf0 0x22 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x2e 0xe1
-0x00 0xf0 0x69 0xe1
-0x00 0xf0 0x6f 0xe1
-0x00 0xf0 0x2f 0xe1
 
 #------------------------------------------------------------------------------
 # MUL