[llvm-commits] [llvm] r142321 - in /llvm/trunk: lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/neon-mov-encoding.s test/MC/ARM/neont2-mov-encoding.s utils/TableGen/EDEmitter.cpp
Jim Grosbach
grosbach at apple.com
Mon Oct 17 17:22:00 PDT 2011
Author: grosbach
Date: Mon Oct 17 19:22:00 2011
New Revision: 142321
URL: http://llvm.org/viewvc/llvm-project?rev=142321&view=rev
Log:
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/trunk/test/MC/ARM/neon-mov-encoding.s
llvm/trunk/test/MC/ARM/neont2-mov-encoding.s
llvm/trunk/utils/TableGen/EDEmitter.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=142321&r1=142320&r2=142321&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Oct 17 19:22:00 2011
@@ -29,6 +29,16 @@
let PrintMethod = "printNEONModImmOperand";
let ParserMatchClass = nImmSplatI16AsmOperand;
}
+def nImmSplatI32AsmOperand : AsmOperandClass { let Name = "NEONi32splat"; }
+def nImmSplatI32 : Operand<i32> {
+ let PrintMethod = "printNEONModImmOperand";
+ let ParserMatchClass = nImmSplatI32AsmOperand;
+}
+def nImmVMOVI32AsmOperand : AsmOperandClass { let Name = "NEONi32vmov"; }
+def nImmVMOVI32 : Operand<i32> {
+ let PrintMethod = "printNEONModImmOperand";
+ let ParserMatchClass = nImmVMOVI32AsmOperand;
+}
def VectorIndex8Operand : AsmOperandClass { let Name = "VectorIndex8"; }
def VectorIndex16Operand : AsmOperandClass { let Name = "VectorIndex16"; }
@@ -3757,7 +3767,7 @@
}
def VORRiv2i32 : N1ModImm<1, 0b000, {0,?,?,1}, 0, 0, 0, 1,
- (outs DPR:$Vd), (ins nModImm:$SIMM, DPR:$src),
+ (outs DPR:$Vd), (ins nImmSplatI32:$SIMM, DPR:$src),
IIC_VMOVImm,
"vorr", "i32", "$Vd, $SIMM", "$src = $Vd",
[(set DPR:$Vd,
@@ -3775,7 +3785,7 @@
}
def VORRiv4i32 : N1ModImm<1, 0b000, {0,?,?,1}, 0, 1, 0, 1,
- (outs QPR:$Vd), (ins nModImm:$SIMM, QPR:$src),
+ (outs QPR:$Vd), (ins nImmSplatI32:$SIMM, QPR:$src),
IIC_VMOVImm,
"vorr", "i32", "$Vd, $SIMM", "$src = $Vd",
[(set QPR:$Vd,
@@ -3806,7 +3816,7 @@
}
def VBICiv2i32 : N1ModImm<1, 0b000, {0,?,?,1}, 0, 0, 1, 1,
- (outs DPR:$Vd), (ins nModImm:$SIMM, DPR:$src),
+ (outs DPR:$Vd), (ins nImmSplatI32:$SIMM, DPR:$src),
IIC_VMOVImm,
"vbic", "i32", "$Vd, $SIMM", "$src = $Vd",
[(set DPR:$Vd,
@@ -3824,7 +3834,7 @@
}
def VBICiv4i32 : N1ModImm<1, 0b000, {0,?,?,1}, 0, 1, 1, 1,
- (outs QPR:$Vd), (ins nModImm:$SIMM, QPR:$src),
+ (outs QPR:$Vd), (ins nImmSplatI32:$SIMM, QPR:$src),
IIC_VMOVImm,
"vbic", "i32", "$Vd, $SIMM", "$src = $Vd",
[(set QPR:$Vd,
@@ -3863,14 +3873,14 @@
}
def VMVNv2i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 0, 1, 1, (outs DPR:$Vd),
- (ins nModImm:$SIMM), IIC_VMOVImm,
+ (ins nImmVMOVI32:$SIMM), IIC_VMOVImm,
"vmvn", "i32", "$Vd, $SIMM", "",
[(set DPR:$Vd, (v2i32 (NEONvmvnImm timm:$SIMM)))]> {
let Inst{11-8} = SIMM{11-8};
}
def VMVNv4i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 1, 1, 1, (outs QPR:$Vd),
- (ins nModImm:$SIMM), IIC_VMOVImm,
+ (ins nImmVMOVI32:$SIMM), IIC_VMOVImm,
"vmvn", "i32", "$Vd, $SIMM", "",
[(set QPR:$Vd, (v4i32 (NEONvmvnImm timm:$SIMM)))]> {
let Inst{11-8} = SIMM{11-8};
@@ -4348,14 +4358,14 @@
}
def VMOVv2i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 0, 0, 1, (outs DPR:$Vd),
- (ins nModImm:$SIMM), IIC_VMOVImm,
+ (ins nImmVMOVI32:$SIMM), IIC_VMOVImm,
"vmov", "i32", "$Vd, $SIMM", "",
[(set DPR:$Vd, (v2i32 (NEONvmovImm timm:$SIMM)))]> {
let Inst{11-8} = SIMM{11-8};
}
def VMOVv4i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 1, 0, 1, (outs QPR:$Vd),
- (ins nModImm:$SIMM), IIC_VMOVImm,
+ (ins nImmVMOVI32:$SIMM), IIC_VMOVImm,
"vmov", "i32", "$Vd, $SIMM", "",
[(set QPR:$Vd, (v4i32 (NEONvmovImm timm:$SIMM)))]> {
let Inst{11-8} = SIMM{11-8};
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=142321&r1=142320&r2=142321&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Oct 17 19:22:00 2011
@@ -935,6 +935,37 @@
return (Value >= 0 && Value < 256) || (Value >= 0x0100 && Value <= 0xff00);
}
+ bool isNEONi32splat() const {
+ if (Kind != k_Immediate)
+ return false;
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
+ // Must be a constant.
+ if (!CE) return false;
+ int64_t Value = CE->getValue();
+ // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X.
+ return (Value >= 0 && Value < 256) ||
+ (Value >= 0x0100 && Value <= 0xff00) ||
+ (Value >= 0x010000 && Value <= 0xff0000) ||
+ (Value >= 0x01000000 && Value <= 0xff000000);
+ }
+
+ bool isNEONi32vmov() const {
+ if (Kind != k_Immediate)
+ return false;
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
+ // Must be a constant.
+ if (!CE) return false;
+ int64_t Value = CE->getValue();
+ // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X,
+ // for VMOV/VMVN only, 00Xf or 0Xff are also accepted.
+ return (Value >= 0 && Value < 256) ||
+ (Value >= 0x0100 && Value <= 0xff00) ||
+ (Value >= 0x010000 && Value <= 0xff0000) ||
+ (Value >= 0x01000000 && Value <= 0xff000000) ||
+ (Value >= 0x01ff && Value <= 0xffff && (Value & 0xff) == 0xff) ||
+ (Value >= 0x01ffff && Value <= 0xffffff && (Value & 0xffff) == 0xffff);
+ }
+
void addExpr(MCInst &Inst, const MCExpr *Expr) const {
// Add as immediates when possible. Null MCExpr = 0.
if (Expr == 0)
@@ -1477,6 +1508,34 @@
Inst.addOperand(MCOperand::CreateImm(Value));
}
+ void addNEONi32splatOperands(MCInst &Inst, unsigned N) const {
+ assert(N == 1 && "Invalid number of operands!");
+ // The immediate encodes the type of constant as well as the value.
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
+ unsigned Value = CE->getValue();
+ if (Value >= 256 && Value <= 0xff00)
+ Value = (Value >> 8) | 0x200;
+ else if (Value > 0xffff && Value <= 0xff0000)
+ Value = (Value >> 16) | 0x400;
+ else if (Value > 0xffffff)
+ Value = (Value >> 24) | 0x600;
+ Inst.addOperand(MCOperand::CreateImm(Value));
+ }
+
+ void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const {
+ assert(N == 1 && "Invalid number of operands!");
+ // The immediate encodes the type of constant as well as the value.
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
+ unsigned Value = CE->getValue();
+ if (Value >= 256 && Value <= 0xffff)
+ Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
+ else if (Value > 0xffff && Value <= 0xffffff)
+ Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
+ else if (Value > 0xffffff)
+ Value = (Value >> 24) | 0x600;
+ Inst.addOperand(MCOperand::CreateImm(Value));
+ }
+
virtual void print(raw_ostream &OS) const;
static ARMOperand *CreateITMask(unsigned Mask, SMLoc S) {
Modified: llvm/trunk/test/MC/ARM/neon-mov-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-mov-encoding.s?rev=142321&r1=142320&r2=142321&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-mov-encoding.s (original)
+++ llvm/trunk/test/MC/ARM/neon-mov-encoding.s Mon Oct 17 19:22:00 2011
@@ -3,23 +3,23 @@
vmov.i8 d16, #0x8
vmov.i16 d16, #0x10
vmov.i16 d16, #0x1000
-@ vmov.i32 d16, #0x20
-@ vmov.i32 d16, #0x2000
-@ vmov.i32 d16, #0x200000
-@ vmov.i32 d16, #0x20000000
-@ vmov.i32 d16, #0x20FF
-@ vmov.i32 d16, #0x20FFFF
+ vmov.i32 d16, #0x20
+ vmov.i32 d16, #0x2000
+ vmov.i32 d16, #0x200000
+ vmov.i32 d16, #0x20000000
+ vmov.i32 d16, #0x20FF
+ vmov.i32 d16, #0x20FFFF
@ vmov.i64 d16, #0xFF0000FF0000FFFF
@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2]
@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xf2]
@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xf2]
-@ FIXME: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
-@ FIXME: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
-@ FIXME: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
-@ FIXME: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2]
-@ FIXME: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2]
-@ FIXME: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2]
+@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2]
@ FIXME: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3]
@@ -27,42 +27,42 @@
vmov.i8 q8, #0x8
vmov.i16 q8, #0x10
vmov.i16 q8, #0x1000
-@ vmov.i32 q8, #0x20
-@ vmov.i32 q8, #0x2000
-@ vmov.i32 q8, #0x200000
-@ vmov.i32 q8, #0x20000000
-@ vmov.i32 q8, #0x20FF
-@ vmov.i32 q8, #0x20FFFF
+ vmov.i32 q8, #0x20
+ vmov.i32 q8, #0x2000
+ vmov.i32 q8, #0x200000
+ vmov.i32 q8, #0x20000000
+ vmov.i32 q8, #0x20FF
+ vmov.i32 q8, #0x20FFFF
@ vmov.i64 q8, #0xFF0000FF0000FFFF
@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xf2]
@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xf2]
@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xf2]
-@ FIXME: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2]
-@ FIXME: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2]
-@ FIXME: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2]
-@ FIXME: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2]
-@ FIXME: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2]
-@ FIXME: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2]
+@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2]
@ FIXME: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3]
vmvn.i16 d16, #0x10
vmvn.i16 d16, #0x1000
-@ vmvn.i32 d16, #0x20
-@ vmvn.i32 d16, #0x2000
-@ vmvn.i32 d16, #0x200000
-@ vmvn.i32 d16, #0x20000000
-@ vmvn.i32 d16, #0x20FF
-@ vmvn.i32 d16, #0x20FFFF
+ vmvn.i32 d16, #0x20
+ vmvn.i32 d16, #0x2000
+ vmvn.i32 d16, #0x200000
+ vmvn.i32 d16, #0x20000000
+ vmvn.i32 d16, #0x20FF
+ vmvn.i32 d16, #0x20FFFF
@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xf2]
@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xf2]
-@ FIXME: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2]
-@ FIXME: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2]
-@ FIXME: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2]
-@ FIXME: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2]
-@ FIXME: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2]
-@ FIXME: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2]
+@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2]
vmovl.s8 q8, d16
vmovl.s16 q8, d16
Modified: llvm/trunk/test/MC/ARM/neont2-mov-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neont2-mov-encoding.s?rev=142321&r1=142320&r2=142321&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neont2-mov-encoding.s (original)
+++ llvm/trunk/test/MC/ARM/neont2-mov-encoding.s Mon Oct 17 19:22:00 2011
@@ -5,66 +5,66 @@
vmov.i8 d16, #0x8
vmov.i16 d16, #0x10
vmov.i16 d16, #0x1000
-@ vmov.i32 d16, #0x20
-@ vmov.i32 d16, #0x2000
-@ vmov.i32 d16, #0x200000
-@ vmov.i32 d16, #0x20000000
-@ vmov.i32 d16, #0x20FF
-@ vmov.i32 d16, #0x20FFFF
+ vmov.i32 d16, #0x20
+ vmov.i32 d16, #0x2000
+ vmov.i32 d16, #0x200000
+ vmov.i32 d16, #0x20000000
+ vmov.i32 d16, #0x20FF
+ vmov.i32 d16, #0x20FFFF
@ vmov.i64 d16, #0xFF0000FF0000FFFF
@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0xc0,0xef,0x18,0x0e]
@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0xc1,0xef,0x10,0x08]
@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0xc1,0xef,0x10,0x0a]
-@ FIXME: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00]
-@ FIXME: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02]
-@ FIXME: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04]
-@ FIXME: vmov.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06]
-@ FIXME: vmov.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x10,0x0c]
-@ FIXME: vmov.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x10,0x0d]
+@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00]
+@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02]
+@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04]
+@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06]
+@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x10,0x0c]
+@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x10,0x0d]
@ FIXME: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x33,0x0e]
vmov.i8 q8, #0x8
vmov.i16 q8, #0x10
vmov.i16 q8, #0x1000
-@ vmov.i32 q8, #0x20
-@ vmov.i32 q8, #0x2000
-@ vmov.i32 q8, #0x200000
-@ vmov.i32 q8, #0x20000000
-@ vmov.i32 q8, #0x20FF
-@ vmov.i32 q8, #0x20FFFF
+ vmov.i32 q8, #0x20
+ vmov.i32 q8, #0x2000
+ vmov.i32 q8, #0x200000
+ vmov.i32 q8, #0x20000000
+ vmov.i32 q8, #0x20FF
+ vmov.i32 q8, #0x20FFFF
@ vmov.i64 q8, #0xFF0000FF0000FFFF
@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0xc0,0xef,0x58,0x0e]
@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0xc1,0xef,0x50,0x08]
@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0xc1,0xef,0x50,0x0a]
-@ FIXME: vmov.i32 q8, #0x20 @ encoding: [0xc2,0xef,0x50,0x00]
-@ FIXME: vmov.i32 q8, #0x2000 @ encoding: [0xc2,0xef,0x50,0x02]
-@ FIXME: vmov.i32 q8, #0x200000 @ encoding: [0xc2,0xef,0x50,0x04]
-@ FIXME: vmov.i32 q8, #0x20000000 @ encoding: [0xc2,0xef,0x50,0x06]
-@ FIXME: vmov.i32 q8, #0x20FF @ encoding: [0xc2,0xef,0x50,0x0c]
-@ FIXME: vmov.i32 q8, #0x20FFFF @ encoding: [0xc2,0xef,0x50,0x0d]
+@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0xc2,0xef,0x50,0x00]
+@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0xc2,0xef,0x50,0x02]
+@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0xc2,0xef,0x50,0x04]
+@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0xc2,0xef,0x50,0x06]
+@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0xc2,0xef,0x50,0x0c]
+@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0xc2,0xef,0x50,0x0d]
@ FIXME: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x73,0x0e]
vmvn.i16 d16, #0x10
vmvn.i16 d16, #0x1000
-@ vmvn.i32 d16, #0x20
-@ vmvn.i32 d16, #0x2000
-@ vmvn.i32 d16, #0x200000
-@ vmvn.i32 d16, #0x20000000
-@ vmvn.i32 d16, #0x20FF
-@ vmvn.i32 d16, #0x20FFFF
+ vmvn.i32 d16, #0x20
+ vmvn.i32 d16, #0x2000
+ vmvn.i32 d16, #0x200000
+ vmvn.i32 d16, #0x20000000
+ vmvn.i32 d16, #0x20FF
+ vmvn.i32 d16, #0x20FFFF
@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0xc1,0xef,0x30,0x08]
@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0xc1,0xef,0x30,0x0a]
-@ FIXME: vmvn.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x30,0x00]
-@ FIXME: vmvn.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x30,0x02]
-@ FIXME: vmvn.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x30,0x04]
-@ FIXME: vmvn.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x30,0x06]
-@ FIXME: vmvn.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x30,0x0c]
-@ FIXME: vmvn.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x30,0x0d]
+@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x30,0x00]
+@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x30,0x02]
+@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x30,0x04]
+@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x30,0x06]
+@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x30,0x0c]
+@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x30,0x0d]
vmovl.s8 q8, d16
Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=142321&r1=142320&r2=142321&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/EDEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/EDEmitter.cpp Mon Oct 17 19:22:00 2011
@@ -599,6 +599,8 @@
IMM("nModImm");
IMM("nImmSplatI8");
IMM("nImmSplatI16");
+ IMM("nImmSplatI32");
+ IMM("nImmVMOVI32");
IMM("imm0_7");
IMM("imm0_15");
IMM("imm0_255");
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