[llvm-commits] [llvm] r141813 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp

[Evan Cheng]

Author: evancheng
Date: Wed Oct 12 16:33:49 2011
New Revision: 141813

URL: http://llvm.org/viewvc/llvm-project?rev=141813&view=rev
Log:
Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=141813&r1=141812&r2=141813&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Oct 12 16:33:49 2011
@@ -37,10 +37,16 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+static cl::opt<bool>
+AvoidSpeculation("avoid-speculation",
+                 cl::desc("MachineLICM should avoid speculation"),
+                 cl::init(false), cl::Hidden);
+
 STATISTIC(NumHoisted,
           "Number of machine instructions hoisted out of loops");
 STATISTIC(NumLowRP,
@@ -1052,14 +1058,17 @@
       return true;
     }
 
-    // High register pressure situation, only hoist if the instruction is going to
-    // be remat'ed.
-    // Also, do not "speculate" in high register pressure situation. If an
+    // Do not "speculate" in high register pressure situation. If an
     // instruction is not guaranteed to be executed in the loop, it's best to be
     // conservative.
-    if ((!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)) ||
-        (!TII->isTriviallyReMaterializable(&MI, AA) &&
-         !MI.isInvariantLoad(AA)))
+    if (AvoidSpeculation &&
+        (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)))
+      return false;
+
+    // High register pressure situation, only hoist if the instruction is going to
+    // be remat'ed.
+    if (!TII->isTriviallyReMaterializable(&MI, AA) &&
+        !MI.isInvariantLoad(AA))
       return false;
   }