[llvm-commits] [llvm] r141585 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-shuffle.ll

[Eli Friedman]

Author: efriedma
Date: Mon Oct 10 17:28:47 2011
New Revision: 141585

URL: http://llvm.org/viewvc/llvm-project?rev=141585&view=rev
Log:
Make sure the X86 backend doesn't explode on 128-bit shuffles in AVX mode.  Fixes PR11102.


Added:
    llvm/trunk/test/CodeGen/X86/avx-shuffle.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=141585&r1=141584&r2=141585&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Oct 10 17:28:47 2011
@@ -3757,12 +3757,8 @@
   if (!Subtarget->hasAVX())
     return false;
 
-  // Match any permutation of 128-bit vector with 64-bit types
-  if (NumLanes == 1 && NumElts != 2)
-    return false;
-
-  // Only match 256-bit with 32 types
-  if (VT.getSizeInBits() == 256 && NumElts != 4)
+  // Only match 256-bit with 64-bit types
+  if (VT.getSizeInBits() != 256 || NumElts != 4)
     return false;
 
   // The mask on the high lane is independent of the low. Both can match
@@ -3793,12 +3789,8 @@
   if (!Subtarget->hasAVX())
     return false;
 
-  // Match any permutation of 128-bit vector with 32-bit types
-  if (NumLanes == 1 && NumElts != 4)
-    return false;
-
-  // Only match 256-bit with 32 types
-  if (VT.getSizeInBits() == 256 && NumElts != 8)
+  // Only match 256-bit with 32-bit types
+  if (VT.getSizeInBits() != 256 || NumElts != 8)
     return false;
 
   // The mask on the high lane should be the same as the low. Actually,

Added: llvm/trunk/test/CodeGen/X86/avx-shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-shuffle.ll?rev=141585&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-shuffle.ll (added)
+++ llvm/trunk/test/CodeGen/X86/avx-shuffle.ll Mon Oct 10 17:28:47 2011
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+
+; PR11102
+define <4 x float> @test1(<4 x float> %a) nounwind {
+  %b = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 5, i32 undef, i32 undef>
+  ret <4 x float> %b
+; CHECK: test1:
+; CHECK: vshufps
+; CHECK: vpshufd
+}