[llvm-commits] [llvm] r141570 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/sse2-blend.ll

[Nadav Rotem]

Author: nadav
Date: Mon Oct 10 14:31:45 2011
New Revision: 141570

URL: http://llvm.org/viewvc/llvm-project?rev=141570&view=rev
Log:
Fix 10892 - When lowering SIGN_EXTEND_INREG do not lower v2i64 because the
instruction set has no 64-bit SRA support.


Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/sse2-blend.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=141570&r1=141569&r2=141570&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Oct 10 14:31:45 2011
@@ -10125,11 +10125,6 @@
     switch (VT.getSimpleVT().SimpleTy) {
       default:
         return SDValue();
-      case MVT::v2i64: {
-        SHLIntrinsicsID = Intrinsic::x86_sse2_pslli_q;
-        SRAIntrinsicsID = 0;
-        break;
-      }
       case MVT::v4i32: {
         SHLIntrinsicsID = Intrinsic::x86_sse2_pslli_d;
         SRAIntrinsicsID = Intrinsic::x86_sse2_psrai_d;
@@ -10149,12 +10144,9 @@
     // In case of 1 bit sext, no need to shr
     if (ExtraVT.getScalarType().getSizeInBits() == 1) return Tmp1;
 
-    if (SRAIntrinsicsID) {
-      Tmp1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
-                         DAG.getConstant(SRAIntrinsicsID, MVT::i32),
-                         Tmp1, ShAmt);
-    }
-    return Tmp1;
+    return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
+                       DAG.getConstant(SRAIntrinsicsID, MVT::i32),
+                       Tmp1, ShAmt);
   }
 
   return SDValue();

Modified: llvm/trunk/test/CodeGen/X86/sse2-blend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-blend.ll?rev=141570&r1=141569&r2=141570&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse2-blend.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse2-blend.ll Mon Oct 10 14:31:45 2011
@@ -24,8 +24,8 @@
 ; CHECK: vsel_i64
 ; CHECK: pxor
 ; CHECK: pand
-; CHECK: pandn
-; CHECK: por
+; CHECK: andnps
+; CHECK: orps
 ; CHECK: ret
 
 define void at vsel_i64(<4 x i64>* %v1, <4 x i64>* %v2) {
@@ -39,8 +39,8 @@
 ; CHECK: vsel_double
 ; CHECK: pxor
 ; CHECK: pand
-; CHECK: pandn
-; CHECK: por
+; CHECK: andnps
+; CHECK: orps
 ; CHECK: ret