[llvm-commits] [llvm] r141365 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/iabs.ll test/CodeGen/Thumb/iabs.ll

[Jim Grosbach]

On Oct 7, 2011, at 5:28 PM, Ana Pazos wrote:

> Thanks, Jim.
> 
> But we cannot use rbss since it sets the condition code flags in CPSR.
> 
> So disabling the optimization in Thumb1 mode is what we should do.
> 
Yep, I completely agree. Thanks again for the patch!

-Jim

> Thanks,
> Ana.
> 
> -----Original Message-----
> From: Jim Grosbach [mailto:grosbach at apple.com] 
> Sent: Friday, October 07, 2011 5:24 PM
> To: Ana Pazos
> Cc: 'Anton Korobeynikov'; rajav at codeaurora.org; llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] [llvm] r141365 - in /llvm/trunk:
> lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMISelLowering.cpp
> lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td
> test/CodeGen/ARM/iabs.ll test/CodeGen/Thumb/iabs.ll
> 
> 
> On Oct 7, 2011, at 5:08 PM, Ana Pazos wrote:
> 
>> Folks,
>> 
>> I tried to find the ARM Architecture Reference Manual for ARMv6 from ARM
> website. It is not available anymore according to this FAQ:
>> 
>> "The original ARM v6 Architecture Reference Manual for the ARM11 cores
> (ARM DDI 0100I) is superseded by the ARMv7-AR Architecture Reference Manual
> which is now the definitive document for Applications and Real-Time variants
> of the v6 and v7 ARM Architecture, including all ARM11-class cores."
>> 
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka6657.html
>> 
>> 
>> But the Architecture Reference Manual for ARMv7A and ARMV7AR (ARM DDI
> 0406B) page A8-285 says this about RSB immediate instruction:
>> 
>> "The immediate value to be added to the value obtained from <Rn>. The only
> permitted value for encoding T1 is 0. See Modified immediate constants in
> Thumb instructions on page A6-17 or Modified immediate constants in ARM
> instructions on page A5-9 for the range of values for encoding T2 or A1".
>> 
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406b/index.h
> tml
> 
> 
> In Thumb1, there is no "rsb r0, r0, #0" instruction, only a "rsbs r0, r0,
> #0" which sets the flags.
> 
>> 
>> 
>> So it should be ok to encode rsb with immediate value 0 in Thumb1 mode...
> Not sure why the assembler complains:
>> 
>> arm-none-linux-gnueabi-gcc -march=armv6 floatsidf.s -o floatsidf.o
>> floatsidf.s: Assembler messages:
>> floatsidf.s:2: Error: character following name is not '#'
>> floatsidf.s:3: Error: unknown pseudo-op: `.private_extern'
>> floatsidf.s:7: Error: junk at end of line, first unrecognized character
> is`_'
>> floatsidf.s:19: Error: cannot honor width suffix -- `rsb r0,r0,#0'
>> floatsidf.s:100: Error: unknown pseudo-op: `.subsections_via_symbols'
>> 
>> Anyways, attached is the patch to disable the optimization in Thumb1 mode.
>> 
>> Thanks,
>> Ana.
>> 
>> -----Original Message-----
>> From: Anton Korobeynikov [mailto:anton at korobeynikov.info] 
>> Sent: Friday, October 07, 2011 2:58 PM
>> To: Ana Pazos
>> Cc: Eric Christopher; llvm-commits at cs.uiuc.edu; rajav at codeaurora.org
>> Subject: Re: [llvm-commits] [llvm] r141365 - in /llvm/trunk:
> lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMISelLowering.cpp
> lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td
> test/CodeGen/ARM/iabs.ll test/CodeGen/Thumb/iabs.ll
>> 
>> Hi Ana,
>> 
>>> What is your command line? Did you set any other flags?
>> Attached is .ll and .s.
>> For me it seems we should just disable this transform in Thumb1 mode.
>> What do you think?
>> 
>> -- 
>> With best regards, Anton Korobeynikov
>> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>> <absthumbpatch.diff>_______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
>