[llvm-commits] [llvm] r141339 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Thu Oct  6 18:33:11 2011
New Revision: 141339

URL: http://llvm.org/viewvc/llvm-project?rev=141339&view=rev
Log:
Fix the check for nested IT instructions in the disassembler.  We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=141339&r1=141338&r2=141339&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Thu Oct  6 18:33:11 2011
@@ -724,15 +724,18 @@
   result = decodeThumb2Instruction16(MI, insn16, Address, this, STI);
   if (result != MCDisassembler::Fail) {
     Size = 2;
+
+    // Nested IT blocks are UNPREDICTABLE.  Must be checked before we add
+    // the Thumb predicate.
+    if (MI.getOpcode() == ARM::t2IT && !ITBlock.empty())
+      result = MCDisassembler::SoftFail;
+
     Check(result, AddThumbPredicate(MI));
 
     // If we find an IT instruction, we need to parse its condition
     // code and mask operands so that we can apply them correctly
     // to the subsequent instructions.
     if (MI.getOpcode() == ARM::t2IT) {
-      // Nested IT blocks are UNPREDICTABLE.
-      if (!ITBlock.empty())
-        return MCDisassembler::SoftFail;
 
       // (3 - the number of trailing zeros) is the number of then / else.
       unsigned firstcond = MI.getOperand(0).getImm();