[llvm-commits] [llvm] r141263 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Bill Wendling]

Author: void
Date: Wed Oct  5 19:53:33 2011
New Revision: 141263

URL: http://llvm.org/viewvc/llvm-project?rev=141263&view=rev
Log:
Add the MBBs before inserting the instructions. Doing it afterwards could lead
to an infinite loop because of the def-use chains.

Also use a frame load instead of store for the LD instruction.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=141263&r1=141262&r2=141263&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Oct  5 19:53:33 2011
@@ -5636,6 +5636,16 @@
   MachineBasicBlock *DispContBB = MF->CreateMachineBasicBlock();
   DispatchBB->addSuccessor(DispContBB);
 
+  // Insert and renumber MBBs.
+  MachineBasicBlock *Last = &MF->back();
+  MF->insert(MF->end(), DispatchBB);
+  MF->insert(MF->end(), DispContBB);
+  MF->insert(MF->end(), TrapBB);
+  MF->RenumberBlocks(Last);
+
+  FIMMO = MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
+                                   MachineMemOperand::MOLoad, 4, 4);
+
   unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
   AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)
                  .addFrameIndex(FI)
@@ -5649,27 +5659,6 @@
     .addImm(ARMCC::HI)
     .addReg(ARM::CPSR);
 
-/*
-
-BB#32: derived from LLVM BB %eh.sjlj.setjmp.catch
-    Predecessors according to CFG: BB#0
-        %vreg11<def> = t2LDRi12 <fi#0>, 4, pred:14, pred:%noreg; mem:Volatile LD4[%sunkaddr131] rGPR:%vreg11
-        t2CMPri %vreg11, 6, pred:14, pred:%noreg, %CPSR<imp-def>; rGPR:%vreg11
-        t2Bcc <BB#33>, pred:8, pred:%CPSR
-    Successors according to CFG: BB#33 BB#35
-
-BB#35: derived from LLVM BB %eh.sjlj.setjmp.catch
-    Predecessors according to CFG: BB#32
-        %vreg12<def> = t2LEApcrelJT <jt#0>, 0, pred:14, pred:%noreg; rGPR:%vreg12
-        %vreg13<def> = t2ADDrs %vreg12<kill>, %vreg11, 18, pred:14, pred:%noreg, opt:%noreg; GPRnopc:%vreg13 rGPR:%vreg12,%vreg11
-        t2BR_JT %vreg13<kill>, %vreg11, <jt#0>, 0; GPRnopc:%vreg13 rGPR:%vreg11
-    Successors according to CFG: BB#3 BB#28 BB#26 BB#24 BB#22 BB#20 BB#31
-
-*/
-
-  FIMMO = MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
-                                   MachineMemOperand::MOLoad, 4, 4);
-
   unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
   AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT), NewVReg2)
                  .addJumpTableIndex(MJTI)
@@ -5694,13 +5683,6 @@
          I = LPadList.begin(), E = LPadList.end(); I != E; ++I)
     DispContBB->addSuccessor(*I);
 
-  // Insert and renumber MBBs.
-  MachineBasicBlock *Last = &MF->back();
-  MF->insert(MF->end(), DispatchBB);
-  MF->insert(MF->end(), DispContBB);
-  MF->insert(MF->end(), TrapBB);
-  MF->RenumberBlocks(Last);
-
   // The instruction is gone now.
   MI->eraseFromParent();