[llvm-commits] [llvm] r141235 - /llvm/trunk/test/TableGen/MultiPat.td
David Greene
greened at obbligato.org
Wed Oct 5 15:42:48 PDT 2011
Author: greened
Date: Wed Oct 5 17:42:48 2011
New Revision: 141235
URL: http://llvm.org/viewvc/llvm-project?rev=141235&view=rev
Log:
Update Test for Multidefs
Update the MultiPat.td test to create some defs via multidefs.
Modified:
llvm/trunk/test/TableGen/MultiPat.td
Modified: llvm/trunk/test/TableGen/MultiPat.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/MultiPat.td?rev=141235&r1=141234&r2=141235&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/MultiPat.td (original)
+++ llvm/trunk/test/TableGen/MultiPat.td Wed Oct 5 17:42:48 2011
@@ -85,8 +85,16 @@
def int_x86_sse2_add_pd : Intrinsic<"addpd">;
def INTRINSIC : Intrinsic<"Dummy">;
def bitconvert;
+def add;
-class MakePat<list<dag> patterns> : Pat<patterns[0], patterns[1]>;
+class MakePatImpl<list<dag> patterns> : Pat<patterns[0], patterns[1]>;
+class MakePat<list<dag> patterns,
+ string suffix,
+ string intr> : MakePatImpl<!foreach(Decls.pattern, patterns,
+ !foreach(Decls.operand, Decls.pattern,
+ !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", suffix, intr)),
+ !subst(REGCLASS, VR128,
+ !subst(MNEMONIC, set, Decls.operand)))))>;
class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr,
list<list<dag>> patterns>
@@ -95,12 +103,7 @@
!foreach(Decls.operand, Decls.pattern,
!subst(INTRINSIC, intr,
!subst(REGCLASS, VR128,
- !subst(MNEMONIC, set, Decls.operand)))))>,
- MakePat<!foreach(Decls.pattern, patterns[1],
- !foreach(Decls.operand, Decls.pattern,
- !subst(INTRINSIC, intr,
- !subst(REGCLASS, VR128,
- !subst(MNEMONIC, set, Decls.operand)))))>;
+ !subst(MNEMONIC, set, Decls.operand)))))>;
multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> {
def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
@@ -108,13 +111,18 @@
def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
!strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)), patterns>;
+
+ multidef <patterns, list<dag> pats, 1> : MakePat<pats, "_ps", intr>;
+ multidef <patterns, list<dag> pats, 1> : MakePat<pats, "_pd", intr>;
}
defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
// rr Patterns
[[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))],
[(set REGCLASS:$dst, (bitconvert (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))),
- (MNEMONIC REGCLASS:$dst, REGCLASS:$src)]]>;
+ (MNEMONIC REGCLASS:$dst, REGCLASS:$src)],
+ [(set REGCLASS:$dst, (add (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))),
+ (MNEMONIC (add REGCLASS:$dst, REGCLASS:$src))]]>;
// CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
// CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
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