[llvm-commits] [llvm] r141043 - /llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

[Jim Grosbach]

Author: grosbach
Date: Mon Oct  3 18:03:26 2011
New Revision: 141043

URL: http://llvm.org/viewvc/llvm-project?rev=141043&view=rev
Log:
Tidy up. 80 columns.

Modified:
    llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h?rev=141043&r1=141042&r2=141043&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h Mon Oct  3 18:03:26 2011
@@ -637,7 +637,7 @@
   /// floating-point value, then return -1.
   static inline int getFP64Imm(const APInt &Imm) {
     uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
-    int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
+    int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
     uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
 
     // We can handle 4 bits of mantissa.