[llvm-commits] patch: use addressing modes for "m" constraints fed by bitcast/GEP

[Nick Lewycky]

The attached patch eagerly evaluates bitcasts and GEPs feeding inline
assembly constraints. That reduces the chance that we'll copy the
result into a register. On this testcase:

void test(short *a,short *b,float *c) {
    char tmp[256];
    __asm__ volatile(
        "%0 %1 %2 %3 %4"
        :
        :"m"(a),"m"(b),"m"(c),"m"(tmp[0]), "m"(tmp[128])
        :"memory","%eax","%ebx","%ecx","%edx","%esi","%edi");
}

previously we'd run out of registers. Now, we emit:

        pushl   %ebx
        pushl   %edi
        pushl   %esi
        subl    $268, %esp              # imm = 0x10C
        movl    292(%esp), %eax
        movl    288(%esp), %ecx
        movl    284(%esp), %edx
        movl    %edx, 264(%esp)
        movl    %ecx, 260(%esp)
        movl    %eax, 256(%esp)
        #APP
        264(%esp) 260(%esp) 256(%esp) (%esp) 128(%esp)
        #NO_APP
        addl    $268, %esp              # imm = 0x10C
        popl    %esi
        popl    %edi
        popl    %ebx
        ret

which clearly has an extra copy, but that's a bug which existed
without my patch anyways. The tmp[0] and tmp[128] don't have any
copies.

Please review!

Nick
-------------- next part --------------
A non-text attachment was scrubbed...
Name: m-constraint-2.patch
Type: text/x-patch
Size: 2336 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20110930/3edc4c7b/attachment.bin>