[llvm-commits] [llvm] r140862 - /llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
Akira Hatanaka
ahatanaka at mips.com
Fri Sep 30 10:26:37 PDT 2011
Author: ahatanak
Date: Fri Sep 30 12:26:36 2011
New Revision: 140862
URL: http://llvm.org/viewvc/llvm-project?rev=140862&view=rev
Log:
isCommutable should be 0 for DSUBu.
Modified:
llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=140862&r1=140861&r2=140862&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Fri Sep 30 12:26:36 2011
@@ -102,7 +102,7 @@
/// Arithmetic Instructions (3-Operand, R-Type)
def DADDu : ArithR64<0x00, 0x2d, "daddu", add, IIAlu, 1>;
-def DSUBu : ArithR64<0x00, 0x2f, "dsubu", sub, IIAlu, 1>;
+def DSUBu : ArithR64<0x00, 0x2f, "dsubu", sub, IIAlu>;
def DAND : LogicR64<0x24, "and", and>;
def DOR : LogicR64<0x25, "or", or>;
def DXOR : LogicR64<0x26, "xor", xor>;
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