[llvm-commits] [llvm] r140647 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/basic-thumb2-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Tue Sep 27 17:18:54 2011
New Revision: 140647

URL: http://llvm.org/viewvc/llvm-project?rev=140647&view=rev
Log:
ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w.

Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140647&r1=140646&r2=140647&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Sep 27 17:18:54 2011
@@ -3936,12 +3936,17 @@
                 (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>;
 def : t2InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
                 (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>;
+
 def : t2InstAlias<"sxtb${p} $Rd, $Rm",
                 (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
 def : t2InstAlias<"sxtb16${p} $Rd, $Rm",
                 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
 def : t2InstAlias<"sxth${p} $Rd, $Rm",
                 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
+def : t2InstAlias<"sxtb${p}.w $Rd, $Rm",
+                (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
+def : t2InstAlias<"sxth${p}.w $Rd, $Rm",
+                (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
 
 def : t2InstAlias<"uxtab${p} $Rd, $Rn, $Rm",
                 (t2UXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>;
@@ -3956,6 +3961,11 @@
 def : t2InstAlias<"uxth${p} $Rd, $Rm",
                 (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
 
+def : t2InstAlias<"uxtb${p}.w $Rd, $Rm",
+                (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
+def : t2InstAlias<"uxth${p}.w $Rd, $Rm",
+                (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
+
 // Extend instruction w/o the ".w" optional width specifier.
 def : t2InstAlias<"uxtb${p} $Rd, $Rm$rot",
                   (t2UXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;

Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140647&r1=140646&r2=140647&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Tue Sep 27 17:18:54 2011
@@ -2517,6 +2517,7 @@
         ite ge
         sxtbge r2, r4
         sxtblt r5, r1, ror #16
+        sxtb.w  r7, r8
 
 @ CHECK: sxtb	r5, r6                  @ encoding: [0x75,0xb2]
 @ CHECK: sxtb.w	r6, r9, ror #8          @ encoding: [0x4f,0xfa,0x99,0xf6]
@@ -2524,6 +2525,7 @@
 @ CHECK: ite	ge                      @ encoding: [0xac,0xbf]
 @ CHECK: sxtbge	r2, r4                  @ encoding: [0x62,0xb2]
 @ CHECK: sxtblt.w	r5, r1, ror #16 @ encoding: [0x4f,0xfa,0xa1,0xf5]
+@ CHECK: sxtb.w	r7, r8                  @ encoding: [0x4f,0xfa,0x88,0xf7]
 
 
 @------------------------------------------------------------------------------
@@ -2553,6 +2555,7 @@
         itt ne
         sxthne r3, r9
         sxthne r2, r2, ror #16
+        sxth.w  r7, r8
 
 @ CHECK: sxth	r1, r6                  @ encoding: [0x31,0xb2]
 @ CHECK: sxth.w	r3, r8, ror #8          @ encoding: [0x0f,0xfa,0x98,0xf3]
@@ -2560,6 +2563,7 @@
 @ CHECK: itt	ne                      @ encoding: [0x1c,0xbf]
 @ CHECK: sxthne.w	r3, r9          @ encoding: [0x0f,0xfa,0x89,0xf3]
 @ CHECK: sxthne.w	r2, r2, ror #16 @ encoding: [0x0f,0xfa,0xa2,0xf2]
+@ CHECK: sxth.w	r7, r8                  @ encoding: [0x0f,0xfa,0x88,0xf7]
 
 
 @------------------------------------------------------------------------------
@@ -3016,6 +3020,7 @@
         it cc
         uxtbcc r5, r1, ror #16
         uxtb r8, r3, ror #24
+        uxtb.w  r7, r8
 
 @ CHECK: it	ge                      @ encoding: [0xa8,0xbf]
 @ CHECK: uxtbge	r2, r4                  @ encoding: [0xe2,0xb2]
@@ -3024,6 +3029,7 @@
 @ CHECK: it	lo                      @ encoding: [0x38,0xbf]
 @ CHECK: uxtblo.w	r5, r1, ror #16 @ encoding: [0x5f,0xfa,0xa1,0xf5]
 @ CHECK: uxtb.w	r8, r3, ror #24         @ encoding: [0x5f,0xfa,0xb3,0xf8]
+@ CHECK: uxtb.w	r7, r8                  @ encoding: [0x5f,0xfa,0x88,0xf7]
 
 
 @------------------------------------------------------------------------------
@@ -3056,6 +3062,7 @@
         it le
         uxthle r2, r2, ror #16
         uxth r9, r3, ror #24
+        uxth.w  r7, r8
 
 @ CHECK: it	ne                      @ encoding: [0x18,0xbf]
 @ CHECK: uxthne.w	r3, r9          @ encoding: [0x1f,0xfa,0x89,0xf3]
@@ -3064,7 +3071,7 @@
 @ CHECK: it	le                      @ encoding: [0xd8,0xbf]
 @ CHECK: uxthle.w	r2, r2, ror #16 @ encoding: [0x1f,0xfa,0xa2,0xf2]
 @ CHECK: uxth.w	r9, r3, ror #24         @ encoding: [0x1f,0xfa,0xb3,0xf9]
-
+@ CHECK: uxth.w	r7, r8                  @ encoding: [0x1f,0xfa,0x88,0xf7]
 
 @------------------------------------------------------------------------------
 @ WFE/WFI/YIELD