[llvm-commits] [llvm] r140601 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Nadav Rotem]

Author: nadav
Date: Tue Sep 27 05:48:29 2011
New Revision: 140601

URL: http://llvm.org/viewvc/llvm-project?rev=140601&view=rev
Log:
Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8,
while the decision is to bit-pack small values.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=140601&r1=140600&r2=140601&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Sep 27 05:48:29 2011
@@ -1180,10 +1180,6 @@
       // bytes.  For example, promote EXTLOAD:i20 -> EXTLOAD:i24.
       unsigned NewWidth = SrcVT.getStoreSizeInBits();
       EVT NVT = EVT::getIntegerVT(*DAG.getContext(), NewWidth);
-      if (SrcVT.isVector()) {
-        NVT = EVT::getVectorVT(*DAG.getContext(), NVT,
-                               SrcVT.getVectorNumElements());
-      }
       SDValue Ch;
 
       // The extra bits are guaranteed to be zero, since we stored them that
@@ -1525,12 +1521,7 @@
         // TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1)
         EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
                                     StVT.getStoreSizeInBits());
-        if (StVT.isVector()) {
-          NVT = EVT::getVectorVT(*DAG.getContext(), NVT,
-                                 StVT.getVectorNumElements());
-        }
-
-        Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT.getScalarType());
+        Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT);
         Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
                                    NVT, isVolatile, isNonTemporal, Alignment);
       } else if (StWidth & (StWidth - 1)) {