[llvm-commits] [PATCH] Fix PR11004: Crash in llc arm backend

[James Molloy]

Hi Cameron,

My testing found most obvious vector types to be supported in codegen (<{1,2,3,4,8,16,32,64} x {float,i8,16,i32,i64}>) - were there any types in particular that aren't supported?

Cheers,

James

From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Cameron Zwarich
Sent: 26 September 2011 06:11
To: David Meyer
Cc: Commit Messages and Patches for LLVM
Subject: Re: [llvm-commits] [PATCH] Fix PR11004: Crash in llc arm backend

On Sep 25, 2011, at 5:45 PM, David Meyer wrote:


Cameron,

With regards to your comment that it is inconsiderate to break the tree intentionally, you are forgetting that this was an experimental feature that never worked outside of small test cases. Neither Clang nor llvm-gcc will generate byval on ARM, so it gets no real testing. It might be more considerate to users to just add an assert saying that ARM byval doesn't work.

I dislike the idea of selective IR support. This creates a hidden (undocumented) contract between the frontends and backends, which limits the IR that is valid. It also treats external producers of bitcode as second-class citizens, since they must effectively mimic Clang or DragonEgg to guarantee that their output will be supported. It is nicer if every backend can handle any valid bitcode (even if doing so is not terribly efficient).

I dislike it too, but be warned that there are other things that just plain aren't supported by the ARM backend, e.g. arbitrary vector types.


If there are no more objections, I'll commit, and un-XFAIL the tests which now pass.
(2011-06-09-TailCallByVal.ll and 2010-11-04-BigByval.ll)

No objections from me.

Cameron


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