[llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td

[Akira Hatanaka]

Author: ahatanak
Date: Thu Sep 22 12:57:32 2011
New Revision: 140319

URL: http://llvm.org/viewvc/llvm-project?rev=140319&view=rev
Log:
Define a new sub-register index sub_32 for accessing the 32-bit sub-register of
a 64-bit integer register. Move the subreg index definitions to the beginning
of the file.




Modified:
    llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td

Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=140319&r1=140318&r2=140319&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Thu Sep 22 12:57:32 2011
@@ -10,6 +10,11 @@
 //===----------------------------------------------------------------------===//
 //  Declarations that describe the MIPS register file
 //===----------------------------------------------------------------------===//
+let Namespace = "Mips" in {
+def sub_fpeven : SubRegIndex;
+def sub_fpodd  : SubRegIndex;
+def sub_32     : SubRegIndex;
+}
 
 // We have banks of 32 registers each.
 class MipsReg<string n> : Register<n> {
@@ -34,10 +39,6 @@
 }
 
 // Mips 64-bit (aliased) FPU Registers
-let Namespace = "Mips" in {
-def sub_fpeven : SubRegIndex;
-def sub_fpodd  : SubRegIndex;
-}
 class AFPR<bits<5> num, string n, list<Register> subregs>
   : MipsRegWithSubRegs<n, subregs> {
   let Num = num;