[llvm-commits] [llvm] r140249 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2011-09-21-setcc-bug.ll

[Nadav Rotem]

Author: nadav
Date: Wed Sep 21 09:34:38 2011
New Revision: 140249

URL: http://llvm.org/viewvc/llvm-project?rev=140249&view=rev
Log:
[VECTOR-SELECT] Address one of the bugs in pr10902.

Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.


Added:
    llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=140249&r1=140248&r2=140249&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Sep 21 09:34:38 2011
@@ -500,6 +500,8 @@
 
 SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
   EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType());
+  // Vector setcc result types need to be leglized.
+  SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT);
 
   DebugLoc dl = N->getDebugLoc();
   assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&

Added: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll?rev=140249&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Wed Sep 21 09:34:38 2011
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 -mcpu=corei7 -promote-elements -mattr=+sse41
+
+; Make sure we are not crashing on this code.
+
+define void @load_4_i8(<4 x i8>* %k, <4 x i8>* %y, <4 x double>* %A1, <4 x double>* %A0)  {
+   %A = load <4 x i8>* %k
+   %B = load <4 x i8>* %y
+   %C = load <4 x double>* %A0
+   %D= load <4 x double>* %A1
+   %M = icmp uge <4 x i8> %A, %B
+   %T = select <4 x i1> %M, <4 x double> %C, <4 x double> %D
+   store <4 x double> %T, <4 x double>* undef
+   ret void
+}
+