[llvm-commits] [llvm] r140199 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Benjamin Kramer]

On 20.09.2011, at 15:34, Bruno Cardoso Lopes wrote:

> Author: bruno
> Date: Tue Sep 20 17:34:45 2011
> New Revision: 140199
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=140199&view=rev
> Log:
> Simplify max/minp[s|d] dagcombine matching
> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> 
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140199&r1=140198&r2=140199&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 17:34:45 2011
> @@ -12562,17 +12562,14 @@
>   // Get the LHS/RHS of the select.
>   SDValue LHS = N->getOperand(1);
>   SDValue RHS = N->getOperand(2);
> +  EVT VT = LHS.getValueType();
> 
>   // If we have SSE[12] support, try to form min/max nodes. SSE min/max
>   // instructions match the semantics of the common C idiom x<y?x:y but not
>   // x<=y?x:y, because of how they handle negative zero (which can be
>   // ignored in unsafe-math mode).
> -  if (Cond.getOpcode() == ISD::SETCC &&
> -      ((Subtarget->hasXMMInt() &&
> -        (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::v4f32 || 
> -         LHS.getValueType() == MVT::f64 || LHS.getValueType() == MVT::v2f64)) ||
> -       (Subtarget->hasAVX() &&
> -        (LHS.getValueType() == MVT::v8f32 || LHS.getValueType() == MVT::v4f64)))) {
> +  if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
> +      VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) {
>     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();

Hi,

This will break if SSE is disabled, in x87 mode floating point types are still legal but it doesn't support the min/max operations.

- Ben