[llvm-commits] [llvm] r140079 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Mon Sep 19 17:34:23 2011
New Revision: 140079

URL: http://llvm.org/viewvc/llvm-project?rev=140079&view=rev
Log:
Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140079&r1=140078&r2=140079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 17:34:23 2011
@@ -454,6 +454,8 @@
       break;
     case ARM::tB:
     case ARM::t2B:
+    case ARM::t2TBB:
+    case ARM::t2TBH:
       // Some instructions (mostly unconditional branches) can
       // only appears at the end of, or outside of, an IT.
       if (ITBlock.size() > 1)