[llvm-commits] [llvm] r139828 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/basic-thumb2-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Thu Sep 15 14:46:13 2011
New Revision: 139828

URL: http://llvm.org/viewvc/llvm-project?rev=139828&view=rev
Log:
Thumb2 assembly parsing and encoding for REV16/REVSH.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=139828&r1=139827&r2=139828&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Sep 15 14:46:13 2011
@@ -3841,5 +3841,7 @@
 def : t2InstAlias<"pop${p}.w $regs", (t2LDMIA_UPD SP, pred:$p, reglist:$regs)>;
 def : t2InstAlias<"pop${p} $regs", (t2LDMIA_UPD SP, pred:$p, reglist:$regs)>;
 
-// Alias for REV without the ".w" optional width specifier.
+// Alias for REV/REV16/REVSH without the ".w" optional width specifier.
 def : t2InstAlias<"rev${p} $Rd, $Rm", (t2REV rGPR:$Rd, rGPR:$Rm, pred:$p)>;
+def : t2InstAlias<"rev16${p} $Rd, $Rm", (t2REV16 rGPR:$Rd, rGPR:$Rm, pred:$p)>;
+def : t2InstAlias<"revsh${p} $Rd, $Rm", (t2REVSH rGPR:$Rd, rGPR:$Rm, pred:$p)>;

Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=139828&r1=139827&r2=139828&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Thu Sep 15 14:46:13 2011
@@ -1442,6 +1442,38 @@
 
 
 @------------------------------------------------------------------------------
+@ REV16
+ at ------------------------------------------------------------------------------
+        rev16.w r1, r2
+        rev16 r2, r8
+        itt ne
+        rev16ne r1, r2
+        rev16ne r1, r8
+
+	rev16.w	r1, r2                  @ encoding: [0x92,0xfa,0x92,0xf1]
+	rev16.w	r2, r8                  @ encoding: [0x98,0xfa,0x98,0xf2]
+	itt	ne                      @ encoding: [0x1c,0xbf]
+	rev16ne	r1, r2                  @ encoding: [0x51,0xba]
+	rev16ne.w	r1, r8          @ encoding: [0x98,0xfa,0x98,0xf1]
+
+
+ at ------------------------------------------------------------------------------
+@ REVSH
+ at ------------------------------------------------------------------------------
+        revsh.w r1, r2
+        revsh r2, r8
+        itt ne
+        revshne r1, r2
+        revshne r1, r8
+
+	revsh.w	r1, r2                  @ encoding: [0x92,0xfa,0xb2,0xf1]
+	revsh.w	r2, r8                  @ encoding: [0x98,0xfa,0xb8,0xf2]
+	itt	ne                      @ encoding: [0x1c,0xbf]
+	revshne	r1, r2                  @ encoding: [0xd1,0xba]
+	revshne.w	r1, r8          @ encoding: [0x98,0xfa,0xb8,0xf1]
+
+
+ at ------------------------------------------------------------------------------
 @ SUB (register)
 @------------------------------------------------------------------------------
         sub.w r5, r2, r12, rrx