[llvm-commits] [llvm] r139758 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Eli Friedman]

Author: efriedma
Date: Wed Sep 14 18:42:45 2011
New Revision: 139758

URL: http://llvm.org/viewvc/llvm-project?rev=139758&view=rev
Log:
Fix the code creating VZEXT_LOAD so that it creates the right memoperand.  Issue spotted in -debug output.  I can't think of any practical effects at the moment, but it might matter if we start doing more aggressive alias analysis in CodeGen.


Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=139758&r1=139757&r2=139758&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 14 18:42:45 2011
@@ -5014,9 +5014,12 @@
              DAG.getTargetLoweringInfo().isTypeLegal(MVT::v2i64)) {
     SDVTList Tys = DAG.getVTList(MVT::v2i64, MVT::Other);
     SDValue Ops[] = { LDBase->getChain(), LDBase->getBasePtr() };
-    SDValue ResNode = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys,
-                                              Ops, 2, MVT::i32,
-                                              LDBase->getMemOperand());
+    SDValue ResNode =
+        DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, 2, MVT::i64,
+                                LDBase->getPointerInfo(),
+                                LDBase->getAlignment(),
+                                false/*isVolatile*/, true/*ReadMem*/,
+                                false/*WriteMem*/);
     return DAG.getNode(ISD::BITCAST, DL, VT, ResNode);
   }
   return SDValue();