[llvm-commits] [llvm] r139686 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_shuffle-38.ll

[Bruno Cardoso Lopes]

Author: bruno
Date: Tue Sep 13 21:36:14 2011
New Revision: 139686

URL: http://llvm.org/viewvc/llvm-project?rev=139686&view=rev
Log:
Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss".

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=139686&r1=139685&r2=139686&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 13 21:36:14 2011
@@ -6348,7 +6348,9 @@
   // matching to x86 specific nodes. Note that for the 1st condition all
   // types are matched with movsd.
   if (HasSSE2) {
-    if (NumElems == 2)
+    // FIXME: isMOVLMask should be checked and matched before getMOVLP,
+    // as to remove this logic from here, as much as possible
+    if (NumElems == 2 || !X86::isMOVLMask(SVOp))
       return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
     return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG);
   }

Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll?rev=139686&r1=139685&r2=139686&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll Tue Sep 13 21:36:14 2011
@@ -43,3 +43,17 @@
   %shuffle = shufflevector <4 x float> %vecin1, <4 x float> %vecin2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
   ret <4 x float> %shuffle
 }
+
+; rdar://10119696
+; CHECK: f
+define <4 x float> @f(<4 x float> %x, double* nocapture %y) nounwind uwtable readonly ssp {
+entry:
+  ; CHECK: movsd  (%
+  ; CHECK-NEXT: movsd  %xmm
+  %u110.i = load double* %y, align 1
+  %tmp8.i = insertelement <2 x double> undef, double %u110.i, i32 0
+  %tmp9.i = bitcast <2 x double> %tmp8.i to <4 x float>
+  %shuffle.i = shufflevector <4 x float> %x, <4 x float> %tmp9.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
+  ret <4 x float> %shuffle.i
+}
+