[llvm-commits] [llvm] r139383 - in /llvm/trunk: lib/Target/Mips/Mips.td lib/Target/Mips/MipsSubtarget.cpp test/CodeGen/Mips/2008-07-05-ByVal.ll test/CodeGen/Mips/2008-07-06-fadd64.ll test/CodeGen/Mips/2008-07-07-FPExtend.ll test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll test/CodeGen/Mips/2008-07-16-SignExtInReg.ll test/CodeGen/Mips/2008-08-03-fabs64.ll test/CodeGen/Mips/2008-08-07-FPRound.ll test/CodeGen/Mips/2008-08-08-bswap.ll
Akira Hatanaka
ahatanak at gmail.com
Fri Sep 9 12:00:51 PDT 2011
Author: ahatanak
Date: Fri Sep 9 14:00:51 2011
New Revision: 139383
URL: http://llvm.org/viewvc/llvm-project?rev=139383&view=rev
Log:
Drop support for Allegrex. Allegrex implements a variant of Mips2.
Modified:
llvm/trunk/lib/Target/Mips/Mips.td
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/test/CodeGen/Mips/2008-07-05-ByVal.ll
llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll
llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll
llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
llvm/trunk/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
llvm/trunk/test/CodeGen/Mips/2008-08-03-fabs64.ll
llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll
llvm/trunk/test/CodeGen/Mips/2008-08-08-bswap.ll
Modified: llvm/trunk/lib/Target/Mips/Mips.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.td?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips.td Fri Sep 9 14:00:51 2011
@@ -82,13 +82,6 @@
def : Proc<"mips32r1", [FeatureMips32]>;
def : Proc<"4ke", [FeatureMips32r2]>;
-// Allegrex is a 32bit subset of r4000, both for integer and fp registers,
-// but much more similar to Mips2 than Mips3. It also contains some of
-// Mips32/Mips32r2 instructions and a custom vector fpu processor.
-def : Proc<"allegrex", [FeatureMips2, FeatureSingleFloat, FeatureEABI,
- FeatureVFPU, FeatureSEInReg, FeatureCondMov, FeatureMulDivAdd,
- FeatureMinMax, FeatureSwap, FeatureBitCount]>;
-
def MipsAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Fri Sep 9 14:00:51 2011
@@ -42,20 +42,4 @@
// Is the target system Linux ?
if (TT.find("linux") == std::string::npos)
IsLinux = false;
-
- // When only the target triple is specified and is
- // a allegrex target, set the features. We also match
- // big and little endian allegrex cores (dont really
- // know if a big one exists)
- if (TT.find("mipsallegrex") != std::string::npos ||
- TT.find("psp") != std::string::npos) {
- MipsABI = EABI;
- IsSingleFloat = true;
- MipsArchVersion = Mips2;
- HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
- HasSEInReg = true;
- HasBitCount = true;
- HasSwap = true;
- HasCondMov = true;
- }
}
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-05-ByVal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-05-ByVal.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-05-ByVal.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-05-ByVal.ll Fri Sep 9 14:00:51 2011
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=mips | grep {lw.*(\$4)} | count 2
+; DISABLED: llc < %s -march=mips | grep {lw.*(\$4)} | count 2
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll Fri Sep 9 14:00:51 2011
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=mips | grep __adddf3
+; DISABLED: llc < %s -march=mips | grep __adddf3
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll Fri Sep 9 14:00:51 2011
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=mips | grep __extendsfdf2
+; DISABLED: llc < %s -march=mips | grep __extendsfdf2
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll Fri Sep 9 14:00:51 2011
@@ -1,8 +1,10 @@
-; RUN: llc < %s -march=mips -o %t
-; RUN: grep __floatsidf %t | count 1
-; RUN: grep __floatunsidf %t | count 1
-; RUN: grep __fixdfsi %t | count 1
-; RUN: grep __fixunsdfsi %t | count 1
+; DISABLED: llc < %s -march=mips -o %t
+; DISABLED: grep __floatsidf %t | count 1
+; DISABLED: grep __floatunsidf %t | count 1
+; DISABLED: grep __fixdfsi %t | count 1
+; DISABLED: grep __fixunsdfsi %t | count 1
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll Fri Sep 9 14:00:51 2011
@@ -1,6 +1,8 @@
-; RUN: llc < %s -march=mips -o %t
-; RUN: grep seh %t | count 1
-; RUN: grep seb %t | count 1
+; DISABLED: llc < %s -march=mips -o %t
+; DISABLED: grep seh %t | count 1
+; DISABLED: grep seb %t | count 1
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-08-03-fabs64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-03-fabs64.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-08-03-fabs64.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-08-03-fabs64.ll Fri Sep 9 14:00:51 2011
@@ -1,6 +1,8 @@
-; RUN: llc < %s -march=mips -o %t
-; RUN: grep {lui.*32767} %t | count 1
-; RUN: grep {ori.*65535} %t | count 1
+; DISABLED: llc < %s -march=mips -o %t
+; DISABLED: grep {lui.*32767} %t | count 1
+; DISABLED: grep {ori.*65535} %t | count 1
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll Fri Sep 9 14:00:51 2011
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=mips | grep __truncdfsf2 | count 1
+; DISABLED: llc < %s -march=mips | grep __truncdfsf2 | count 1
+; RUN: false
+; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
Modified: llvm/trunk/test/CodeGen/Mips/2008-08-08-bswap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-08-bswap.ll?rev=139383&r1=139382&r2=139383&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-08-08-bswap.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-08-08-bswap.ll Fri Sep 9 14:00:51 2011
@@ -1,4 +1,7 @@
-; RUN: llc < %s | grep wsbw | count 1
+; DISABLED: llc < %s | grep wsbw | count 1
+; RUN: false
+; XFAIL: *
+
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "psp"
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