[llvm-commits] [llvm] r139309 - /llvm/trunk/test/CodeGen/X86/avx-blend.ll
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Thu Sep 8 11:32:36 PDT 2011
Author: bruno
Date: Thu Sep 8 13:32:36 2011
New Revision: 139309
URL: http://llvm.org/viewvc/llvm-project?rev=139309&view=rev
Log:
Remove this crashing test, until I figure out what's going wrong here
Removed:
llvm/trunk/test/CodeGen/X86/avx-blend.ll
Removed: llvm/trunk/test/CodeGen/X86/avx-blend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-blend.ll?rev=139308&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-blend.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-blend.ll (removed)
@@ -1,47 +0,0 @@
-; RUN: llc < %s -mattr=+avx -march=x86 | FileCheck %s
-
-;CHECK: vsel_float
-;CHECK: vblendvps
-;CHECK: ret
-define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
- %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %v1, <4 x float> %v2
- ret <4 x float> %vsel
-}
-
-
-;CHECK: vsel_i32
-;CHECK: vblendvps
-;CHECK: ret
-define <4 x i32> @vsel_i32(<4 x i32> %v1, <4 x i32> %v2) {
- %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> %v1, <4 x i32> %v2
- ret <4 x i32> %vsel
-}
-
-
-;CHECK: vsel_double
-;CHECK: vblendvpd
-;CHECK: ret
-define <2 x double> @vsel_double(<2 x double> %v1, <2 x double> %v2) {
- %vsel = select <2 x i1> <i1 true, i1 false>, <2 x double> %v1, <2 x double> %v2
- ret <2 x double> %vsel
-}
-
-
-;CHECK: vsel_i64
-;CHECK: vblendvpd
-;CHECK: ret
-define <2 x i64> @vsel_i64(<2 x i64> %v1, <2 x i64> %v2) {
- %vsel = select <2 x i1> <i1 true, i1 false>, <2 x i64> %v1, <2 x i64> %v2
- ret <2 x i64> %vsel
-}
-
-
-;CHECK: vsel_i8
-;CHECK: vpblendvb
-;CHECK: ret
-define <16 x i8> @vsel_i8(<16 x i8> %v1, <16 x i8> %v2) {
- %vsel = select <16 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <16 x i8> %v1, <16 x i8> %v2
- ret <16 x i8> %vsel
-}
-
-
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