[llvm-commits] [llvm] r139171 - /llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt

Owen Anderson resistor at mac.com
Tue Sep 6 13:26:34 PDT 2011


Author: resistor
Date: Tue Sep  6 15:26:34 2011
New Revision: 139171

URL: http://llvm.org/viewvc/llvm-project?rev=139171&view=rev
Log:
Port more encoding tests over to Thumb2 decoding tests.

Modified:
    llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt

Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt?rev=139171&r1=139170&r2=139171&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Tue Sep  6 15:26:34 2011
@@ -24,6 +24,228 @@
 0x42 0xf5 0xd0 0x64
 
 #------------------------------------------------------------------------------
+# ADC (register)
+#------------------------------------------------------------------------------
+# CHECK: adc.w r4, r5, r6
+# CHECK: adcs.w r4, r5, r6
+# CHECK: adc.w r9, r1, r3
+# CHECK: adcs.w r9, r1, r3
+# CHECK: adc.w r0, r1, r3, ror #4
+# CHECK: adcs.w  r0, r1, r3, lsl #7
+# CHECK: adc.w r0, r1, r3, lsr #31
+# CHECK: adcs.w  r0, r1, r3, asr #32
+
+0x45 0xeb 0x06 0x04
+0x55 0xeb 0x06 0x04
+0x41 0xeb 0x03 0x09
+0x51 0xeb 0x03 0x09
+0x41 0xeb 0x33 0x10
+0x51 0xeb 0xc3 0x10
+0x41 0xeb 0xd3 0x70
+0x51 0xeb 0x23 0x00
+
+
+#------------------------------------------------------------------------------
+# ADD (immediate)
+#------------------------------------------------------------------------------
+# CHECK: itet eq
+# CHECK: addeq r1, r2, #4
+# CHECK: addwne r5, r3, #1023
+# CHECK: addweq r4, r5, #293
+# CHECK: add.w r2, sp, #1024
+# CHECK: add.w r2, r8, #65280
+# CHECK: addw r2, r3, #257
+# CHECK: add.w r12, r6, #256
+# CHECK: addw r12, r6, #256
+# CHECK: adds.w r1, r2, #496
+
+0x0a 0xbf
+0x11 0x1d
+0x03 0xf2 0xff 0x35
+0x05 0xf2 0x25 0x14
+0x0d 0xf5 0x80 0x62
+0x08 0xf5 0x7f 0x42
+0x03 0xf2 0x01 0x12
+0x06 0xf5 0x80 0x7c
+0x06 0xf2 0x00 0x1c
+0x12 0xf5 0xf8 0x71
+
+
+#------------------------------------------------------------------------------
+# ADD (register)
+#------------------------------------------------------------------------------
+# CHECK: add.w r1, r2, r8
+# CHECK: add.w r5, r9, r2, asr #32
+# CHECK: adds.w r7, r3, r1, lsl #31
+# CHECK: adds.w r0, r3, r6, lsr #25
+# CHECK: add.w r4, r8, r1, ror #12
+
+0x02 0xeb 0x08 0x01
+0x09 0xeb 0x22 0x05
+0x13 0xeb 0xc1 0x77
+0x13 0xeb 0x56 0x60
+0x08 0xeb 0x31 0x34
+
+
+#------------------------------------------------------------------------------
+# FIXME: ADR
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# AND (immediate)
+#------------------------------------------------------------------------------
+# CHECK: and r2, r5, #1044480
+# CHECK: ands r3, r12, #15
+# CHECK: and r1, r1, #255
+
+0x05 0xf4 0x7f 0x22
+0x1c 0xf0 0x0f 0x03
+0x01 0xf0 0xff 0x01
+
+
+#------------------------------------------------------------------------------
+# AND (register)
+#------------------------------------------------------------------------------
+# CHECK: and.w r4, r9, r8
+# CHECK: and.w r1, r4, r8, asr #3
+# CHECK: ands.w r2, r1, r7, lsl #1
+# CHECK: ands.w r4, r5, r2, lsr #20
+# CHECK: and.w r9, r12, r1, ror #17
+
+0x09 0xea 0x08 0x04
+0x04 0xea 0xe8 0x01
+0x11 0xea 0x47 0x02
+0x15 0xea 0x12 0x54
+0x0c 0xea 0x71 0x49
+
+#------------------------------------------------------------------------------
+# ASR (immediate)
+#------------------------------------------------------------------------------
+# CHECK: asr.w r2, r3, #12
+# CHECK: asrs.w r8, r3, #32
+# CHECK: asrs.w r2, r3, #1
+# CHECK: asr.w r2, r3, #4
+# CHECK: asrs.w r2, r12, #15
+
+# CHECK: asr.w r3, r3, #19
+# CHECK: asrs.w r8, r8, #2
+# CHECK: asrs.w r7, r7, #5
+# CHECK: asr.w r12, r12, #21
+
+0x4f 0xea 0x23 0x32
+0x5f 0xea 0x23 0x08
+0x5f 0xea 0x63 0x02
+0x4f 0xea 0x23 0x12
+0x5f 0xea 0xec 0x32
+
+0x4f 0xea 0xe3 0x43
+0x5f 0xea 0xa8 0x08
+0x5f 0xea 0x67 0x17
+0x4f 0xea 0x6c 0x5c
+
+
+#------------------------------------------------------------------------------
+# ASR (register)
+#------------------------------------------------------------------------------
+# CHECK: asr.w r3, r4, r2
+# CHECK: asr.w r1, r1, r2
+# CHECK: asrs.w r3, r4, r8
+
+0x44 0xfa 0x02 0xf3
+0x41 0xfa 0x02 0xf1
+0x54 0xfa 0x08 0xf3
+
+#------------------------------------------------------------------------------
+# B
+#------------------------------------------------------------------------------
+# CHECK: bmi.w   #-183396
+
+0x13 0xf5 0xce 0xa9
+
+
+#------------------------------------------------------------------------------
+# BFC
+#------------------------------------------------------------------------------
+# CHECK: bfc r5, #3, #17
+# CHECK: it lo
+# CHECK: bfclo r5, #3, #17
+
+0x6f 0xf3 0xd3 0x05
+0x38 0xbf
+0x6f 0xf3 0xd3 0x05
+
+
+#------------------------------------------------------------------------------
+# BFI
+#------------------------------------------------------------------------------
+# CHECK: bfi r5, r2, #3, #17
+# CHECK: it ne
+# CHECK: bfine r5, r2, #3, #17
+
+0x62 0xf3 0xd3 0x05
+0x18 0xbf
+0x62 0xf3 0xd3 0x05
+
+
+#------------------------------------------------------------------------------
+# BIC
+#------------------------------------------------------------------------------
+# CHECK: bic r10, r1, #15
+# CHECK: bic.w r12, r3, r6
+# CHECK: bic.w r11, r2, r6, lsl #12
+# CHECK: bic.w r8, r4, r1, lsr #11
+# CHECK: bic.w r7, r5, r7, lsr #15
+# CHECK: bic.w r6, r7, r9, asr #32
+# CHECK: bic.w r5, r6, r8, ror #1
+
+# CHECK: bic r1, r1, #15
+# CHECK: bic.w r1, r1, r1
+# CHECK: bic.w r4, r4, r2, lsl #31
+# CHECK: bic.w r6, r6, r3, lsr #12
+# CHECK: bic.w r7, r7, r4, lsr #7
+# CHECK: bic.w r8, r8, r5, asr #15
+# CHECK: bic.w r12, r12, r6, ror #29
+
+0x21 0xf0 0x0f 0x0a
+0x23 0xea 0x06 0x0c
+0x22 0xea 0x06 0x3b
+0x24 0xea 0xd1 0x28
+0x25 0xea 0xd7 0x37
+0x27 0xea 0x29 0x06
+0x26 0xea 0x78 0x05
+
+0x21 0xf0 0x0f 0x01
+0x21 0xea 0x01 0x01
+0x24 0xea 0xc2 0x74
+0x26 0xea 0x13 0x36
+0x27 0xea 0xd4 0x17
+0x28 0xea 0xe5 0x38
+0x2c 0xea 0x76 0x7c
+
+
+#------------------------------------------------------------------------------
+# BXJ
+#------------------------------------------------------------------------------
+# CHECK: bxj r5
+# CHECK: it ne
+# CHECK: bxjne r7
+
+0xc5 0xf3 0x00 0x8f
+0x18 0xbf
+0xc7 0xf3 0x00 0x8f
+
+
+#------------------------------------------------------------------------------
+# CBZ/CBNZ
+#------------------------------------------------------------------------------
+# CHECK: cbnz    r7, #6
+# CHECK: cbnz    r7, #12
+
+0x1f 0xb9
+0x37 0xb9
+
+
+#------------------------------------------------------------------------------
 # IT
 #------------------------------------------------------------------------------
 # Test encodings of a few full IT blocks, not just the IT instruction





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