[llvm-commits] [llvm] r138951 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-vbroadcast.ll
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Thu Sep 1 11:15:06 PDT 2011
Author: bruno
Date: Thu Sep 1 13:15:06 2011
New Revision: 138951
URL: http://llvm.org/viewvc/llvm-project?rev=138951&view=rev
Log:
Fix vbroadcast matching logic to early unmatch if the node doesn't have
only one use. Fix PR10825.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=138951&r1=138950&r2=138951&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Sep 1 13:15:06 2011
@@ -6409,12 +6409,16 @@
if (Is256)
V = V.getOperand(1);
- if (V.hasOneUse() && V.getOpcode() != ISD::SCALAR_TO_VECTOR)
+
+ if (!V.hasOneUse())
return false;
// Check the source scalar_to_vector type. 256-bit broadcasts are
// supported for 32/64-bit sizes, while 128-bit ones are only supported
// for 32-bit scalars.
+ if (V.getOpcode() != ISD::SCALAR_TO_VECTOR)
+ return false;
+
unsigned ScalarSize = V.getOperand(0).getValueType().getSizeInBits();
if (ScalarSize != 32 && ScalarSize != 64)
return false;
Modified: llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll?rev=138951&r1=138950&r2=138951&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll Thu Sep 1 13:15:06 2011
@@ -75,6 +75,7 @@
; CHECK: _G
; CHECK-NOT: vbroadcastsd (%
+; CHECK: ret
define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp {
entry:
%q = load i64* %ptr, align 8
@@ -82,3 +83,12 @@
%vecinit2.i = insertelement <2 x i64> %vecinit.i, i64 %q, i32 1
ret <2 x i64> %vecinit2.i
}
+
+; CHECK: _H
+; CHECK-NOT: vbroadcastss
+; CHECK: ret
+define <4 x i32> @H(<4 x i32> %a) {
+ %x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
+ ret <4 x i32> %x
+}
+
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