[llvm-commits] [llvm] r138945 - /llvm/trunk/lib/CodeGen/InlineSpiller.cpp

Jakob Stoklund Olesen stoklund at 2pi.dk
Thu Sep 1 10:25:18 PDT 2011


Author: stoklund
Date: Thu Sep  1 12:25:18 2011
New Revision: 138945

URL: http://llvm.org/viewvc/llvm-project?rev=138945&view=rev
Log:
Revert r138794, "Do not try to rematerialize a value from a partial definition."

The problem is fixed for all register allocators by r138944, so this
patch is no longer necessary.

<rdar://problem/10032939>

Modified:
    llvm/trunk/lib/CodeGen/InlineSpiller.cpp

Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=138945&r1=138944&r2=138945&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Thu Sep  1 12:25:18 2011
@@ -189,20 +189,6 @@
   return 0;
 }
 
-/// isFullDefOf - Return true if MI defines the full contents of a register.
-/// Since this is in the context of spilling, it does not do anything special
-/// for physical registers.
-static bool isFullDefOf(const MachineInstr *MI, unsigned Reg) {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isDef() || MO.getSubReg())
-      continue;
-    if (MO.getReg() == Reg)
-      return true;
-  }
-  return false;
-}
-
 /// isSnippet - Identify if a live interval is a snippet that should be spilled.
 /// It is assumed that SnipLI is a virtual register with the same original as
 /// Edit->getReg().
@@ -320,7 +306,6 @@
   MachineBasicBlock *SpillMBB = UseMBB;
   unsigned SpillDepth = Loops.getLoopDepth(SpillMBB);
   bool SeenOrigPHI = false; // Original PHI met.
-  bool SeenNonReloadDef = false;
 
   do {
     unsigned Reg;
@@ -422,18 +407,12 @@
     }
 
     // Potential remat candidate.
-    SeenNonReloadDef = true;
-    if (!isFullDefOf(MI, Reg)) {
-      DEBUG(dbgs() << "  partial def " << PrintReg(Reg) << ':'
-                   << VNI->id << '@' << VNI->def << '\t' << *MI);
-      continue;
-    }
     DEBUG(dbgs() << "  def " << PrintReg(Reg) << ':'
                  << VNI->id << '@' << VNI->def << '\t' << *MI);
     SVI.DefMI = MI;
   } while (!WorkList.empty());
 
-  if (SeenOrigPHI || SeenNonReloadDef)
+  if (SeenOrigPHI || SVI.DefMI)
     SVI.AllDefsAreReloads = false;
 
   DEBUG({





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