[llvm-commits] [llvm] r138794 - /llvm/trunk/lib/CodeGen/InlineSpiller.cpp

[Bob Wilson]

Jakob wants to try a less conservative fix.  I'm going to leave it up to him to find a testcase.

On Aug 29, 2011, at 10:36 PM, Bob Wilson wrote:

> Author: bwilson
> Date: Tue Aug 30 00:36:02 2011
> New Revision: 138794
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=138794&view=rev
> Log:
> Do not try to rematerialize a value from a partial definition.
> I don't currently have a good testcase for this; will try to get one
> tomorrow.  <rdar://problem/10032939>
> 
> Modified:
>    llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=138794&r1=138793&r2=138794&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
> +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Tue Aug 30 00:36:02 2011
> @@ -189,6 +189,20 @@
>   return 0;
> }
> 
> +/// isFullDefOf - Return true if MI defines the full contents of a register.
> +/// Since this is in the context of spilling, it does not do anything special
> +/// for physical registers.
> +static bool isFullDefOf(const MachineInstr *MI, unsigned Reg) {
> +  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> +    const MachineOperand &MO = MI->getOperand(i);
> +    if (!MO.isReg() || !MO.isDef() || MO.getSubReg())
> +      continue;
> +    if (MO.getReg() == Reg)
> +      return true;
> +  }
> +  return false;
> +}
> +
> /// isSnippet - Identify if a live interval is a snippet that should be spilled.
> /// It is assumed that SnipLI is a virtual register with the same original as
> /// Edit->getReg().
> @@ -306,6 +320,7 @@
>   MachineBasicBlock *SpillMBB = UseMBB;
>   unsigned SpillDepth = Loops.getLoopDepth(SpillMBB);
>   bool SeenOrigPHI = false; // Original PHI met.
> +  bool SeenNonReloadDef = false;
> 
>   do {
>     unsigned Reg;
> @@ -407,12 +422,18 @@
>     }
> 
>     // Potential remat candidate.
> +    SeenNonReloadDef = true;
> +    if (!isFullDefOf(MI, Reg)) {
> +      DEBUG(dbgs() << "  partial def " << PrintReg(Reg) << ':'
> +                   << VNI->id << '@' << VNI->def << '\t' << *MI);
> +      continue;
> +    }
>     DEBUG(dbgs() << "  def " << PrintReg(Reg) << ':'
>                  << VNI->id << '@' << VNI->def << '\t' << *MI);
>     SVI.DefMI = MI;
>   } while (!WorkList.empty());
> 
> -  if (SeenOrigPHI || SVI.DefMI)
> +  if (SeenOrigPHI || SeenNonReloadDef)
>     SVI.AllDefsAreReloads = false;
> 
>   DEBUG({
> 
> 
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