[llvm-commits] [llvm] r138642 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Fri Aug 26 14:39:26 2011
New Revision: 138642

URL: http://llvm.org/viewvc/llvm-project?rev=138642&view=rev
Log:
Update for feedback from Jim.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=138642&r1=138641&r2=138642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Fri Aug 26 14:39:26 2011
@@ -2319,13 +2319,13 @@
   CHECK(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder));
 
   switch(Inst.getOpcode()) {
+    default:
+      return Fail;
     case ARM::tADR:
-      break;
+      break; // tADR does not explicitly represent the PC as an oeprand.
     case ARM::tADDrSPi:
       Inst.addOperand(MCOperand::CreateReg(ARM::SP));
       break;
-    default:
-      return Fail;
   }
 
   Inst.addOperand(MCOperand::CreateImm(imm));