[llvm-commits] [llvm] r138592 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td

Bruno Cardoso Lopes bruno.cardoso at gmail.com
Thu Aug 25 15:23:58 PDT 2011


Author: bruno
Date: Thu Aug 25 17:23:58 2011
New Revision: 138592

URL: http://llvm.org/viewvc/llvm-project?rev=138592&view=rev
Log:
Do the same as r138461. Mark VZEROALL as clobbering all YMM registers

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=138592&r1=138591&r2=138592&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Aug 25 17:23:58 2011
@@ -6175,12 +6175,11 @@
   def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall",
                    [(int_x86_avx_vzeroall)]>, TB, VEX, VEX_L, Requires<[HasAVX]>;
 
+  // Zero Upper bits of YMM registers
+  def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper",
+                     [(int_x86_avx_vzeroupper)]>, TB, VEX, Requires<[HasAVX]>;
 }
 
-// Zero Upper bits of YMM registers
-def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper",
-                   [(int_x86_avx_vzeroupper)]>, TB, VEX, Requires<[HasAVX]>;
-
 //===----------------------------------------------------------------------===//
 // SSE Shuffle pattern fragments
 //===----------------------------------------------------------------------===//





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