[llvm-commits] [llvm] r138494 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Wed Aug 24 16:42:27 2011
New Revision: 138494

URL: http://llvm.org/viewvc/llvm-project?rev=138494&view=rev
Log:
Thumb parsing and encoding for SUB (SP minu immediate).

Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/basic-thumb-instructions.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=138494&r1=138493&r2=138494&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Aug 24 16:42:27 2011
@@ -335,10 +335,6 @@
   let DecoderMethod = "DecodeThumbAddSPImm";
 }
 
-// Can optionally specify SP as a three operand instruction.
-def : tInstAlias<"add${p} sp, sp, $imm",
-                 (tADDspi SP, t_imm0_508s4:$imm, pred:$p)>;
-
 // SUB sp, sp, #<imm7>
 // FIXME: The encoding and the ASM string don't match up.
 def tSUBspi : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, t_imm0_508s4:$imm),
@@ -350,6 +346,12 @@
   let DecoderMethod = "DecodeThumbAddSPImm";
 }
 
+// Can optionally specify SP as a three operand instruction.
+def : tInstAlias<"add${p} sp, sp, $imm",
+                 (tADDspi SP, t_imm0_508s4:$imm, pred:$p)>;
+def : tInstAlias<"sub${p} sp, sp, $imm",
+                 (tSUBspi SP, t_imm0_508s4:$imm, pred:$p)>;
+
 // ADD <Rm>, sp
 def tADDrSP : T1pIt<(outs GPR:$Rdn), (ins GPR:$Rn, GPRsp:$sp), IIC_iALUr,
                   "add", "\t$Rdn, $sp, $Rn", []>,

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=138494&r1=138493&r2=138494&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Aug 24 16:42:27 2011
@@ -2923,9 +2923,13 @@
       static_cast<ARMOperand*>(Operands[4])->getReg() == ARM::SP &&
       static_cast<ARMOperand*>(Operands[1])->getReg() == 0)
     return true;
-  // Register-register 'add' for thumb does not have a cc_out operand
-  // when it's an ADD SP, #imm.
-  if (isThumb() && Mnemonic == "add" && Operands.size() == 5 &&
+  // Register-register 'add/sub' for thumb does not have a cc_out operand
+  // when it's an ADD/SUB SP, #imm. Be lenient on count since there's also
+  // the "add/sub SP, SP, #imm" version. If the follow-up operands aren't
+  // right, this will result in better diagnostics (which operand is off)
+  // anyway.
+  if (isThumb() && (Mnemonic == "add" || Mnemonic == "sub") &&
+      (Operands.size() == 5 || Operands.size() == 6) &&
       static_cast<ARMOperand*>(Operands[3])->isReg() &&
       static_cast<ARMOperand*>(Operands[3])->getReg() == ARM::SP &&
       static_cast<ARMOperand*>(Operands[1])->getReg() == 0)

Modified: llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb-instructions.s?rev=138494&r1=138493&r2=138494&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb-instructions.s Wed Aug 24 16:42:27 2011
@@ -538,11 +538,13 @@
 
 
 @------------------------------------------------------------------------------
-@ FIXME: SUB (SP minus immediate)
- at ------------------------------------------------------------------------------
- at ------------------------------------------------------------------------------
-@ FIXME: SUB (SP minus register)
+@ SUB (SP minus immediate)
 @------------------------------------------------------------------------------
+        sub sp, #12
+        sub sp, sp, #508
+
+@ CHECK: sub	sp, #12                 @ encoding: [0x83,0xb0]
+@ CHECK: sub	sp, #508                @ encoding: [0xff,0xb0]
 
 
 @------------------------------------------------------------------------------