[llvm-commits] [llvm] r138478 - in /llvm/trunk: include/llvm/CodeGen/ISDOpcodes.h include/llvm/CodeGen/SelectionDAG.h include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/Target/TargetSelectionDAG.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrCompiler.td

[Nick Lewycky]

Eli Friedman wrote:
> Author: efriedma
> Date: Wed Aug 24 15:50:09 2011
> New Revision: 138478
>
> URL: http://llvm.org/viewvc/llvm-project?rev=138478&view=rev
> Log:
> Basic x86 code generation for atomic load and store instructions.

Cool!

> +static SDValue LowerATOMIC_STORE(SDValue Op, SelectionDAG&DAG) {
> +  SDNode *Node = Op.getNode();
> +  DebugLoc dl = Node->getDebugLoc();
> +
> +  // Convert seq_cst store ->  xchg
> +  if (cast<AtomicSDNode>(Node)->getOrdering() == SequentiallyConsistent) {
> +    SDValue Swap =  DAG.getAtomic(ISD::ATOMIC_SWAP, dl,
> +                                  cast<AtomicSDNode>(Node)->getMemoryVT(),
> +                                   Node->getOperand(0),

Extra space after = sign, also the rest of these lines don't line up.

Nick

> +                                   Node->getOperand(1), Node->getOperand(2),
> +                                   cast<AtomicSDNode>(Node)->getSrcValue(),
> +                                   cast<AtomicSDNode>(Node)->getAlignment(),
> +                                   cast<AtomicSDNode>(Node)->getOrdering(),
> +                                   cast<AtomicSDNode>(Node)->getSynchScope());
> +    return Swap.getValue(1);
> +  }
> +  // Other atomic stores have a simple pattern.
> +  return Op;
> +}