[llvm-commits] [llvm] r138461 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Wed Aug 24 11:48:33 PDT 2011
Author: bruno
Date: Wed Aug 24 13:48:33 2011
New Revision: 138461
URL: http://llvm.org/viewvc/llvm-project?rev=138461&view=rev
Log:
Mark VZEROALL as clobbering all YMM registers
Modified:
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=138461&r1=138460&r2=138461&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Aug 24 13:48:33 2011
@@ -5876,9 +5876,13 @@
//===----------------------------------------------------------------------===//
// VZERO - Zero YMM registers
//
-// Zero All YMM registers
-def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall",
- [(int_x86_avx_vzeroall)]>, VEX, VEX_L, Requires<[HasAVX]>;
+let Defs = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7,
+ YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14, YMM15] in {
+ // Zero All YMM registers
+ def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall",
+ [(int_x86_avx_vzeroall)]>, VEX, VEX_L, Requires<[HasAVX]>;
+
+}
// Zero Upper bits of YMM registers
def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper",
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