[llvm-commits] [llvm] r138441 - /llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt

[Owen Anderson]

Author: resistor
Date: Wed Aug 24 12:08:34 2011
New Revision: 138441

URL: http://llvm.org/viewvc/llvm-project?rev=138441&view=rev
Log:
Port over more encoding tests to decoding tests.

Modified:
    llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt

Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt?rev=138441&r1=138440&r2=138441&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt Wed Aug 24 12:08:34 2011
@@ -343,3 +343,151 @@
 
 0x58 0xb6
 0x50 0xb6
+
+#------------------------------------------------------------------------------
+# STM
+#------------------------------------------------------------------------------
+# CHECK: stm r1!, {r2, r6}
+# CHECK: stm r1!, {r1, r2, r3, r7}
+
+0x44 0xc1
+0x8e 0xc1
+
+
+#------------------------------------------------------------------------------
+# STR (immediate)
+#------------------------------------------------------------------------------
+# CHECK: str r2, [r7]
+# CHECK: str r2, [r7]
+# CHECK: str r5, [r1, #4]
+# CHECK: str r3, [r7, #124]
+# CHECK: str r2, [sp]
+# CHECK: str r3, [sp]
+# CHECK: str r4, [sp, #20]
+# CHECK: str r5, [sp, #1020]
+
+0x3a 0x60
+0x3a 0x60
+0x4d 0x60
+0xfb 0x67
+0x00 0x92
+0x00 0x93
+0x05 0x94
+0xff 0x95
+
+
+#------------------------------------------------------------------------------
+# STR (register)
+#------------------------------------------------------------------------------
+# CHECK: str r2, [r7, r3]
+
+0xfa 0x50
+
+
+#------------------------------------------------------------------------------
+# STRB (immediate)
+#------------------------------------------------------------------------------
+# CHECK: strb r4, [r3]
+# CHECK: strb r5, [r6]
+# CHECK: strb r6, [r7, #31]
+
+0x1c 0x70
+0x35 0x70
+0xfe 0x77
+
+
+#------------------------------------------------------------------------------
+# STRB (register)
+#------------------------------------------------------------------------------
+# CHECK: strb r6, [r4, r5]
+
+0x66 0x55
+
+
+#------------------------------------------------------------------------------
+# STRH (immediate)
+#------------------------------------------------------------------------------
+# CHECK: strh r3, [r3]
+# CHECK: strh r4, [r6, #2]
+# CHECK: strh r5, [r7, #62]
+
+0x1b 0x80
+0x74 0x80
+0xfd 0x87
+
+
+#------------------------------------------------------------------------------
+# STRH (register)
+#------------------------------------------------------------------------------
+# CHECK: strh r6, [r2, r6]
+
+0x96 0x53
+
+
+#------------------------------------------------------------------------------
+# SUB (immediate)
+#------------------------------------------------------------------------------
+# CHECK: subs r1, r2, #3
+# CHECK: subs r2, #3
+# CHECK: subs r2, #8
+
+0xd1 0x1e
+0x03 0x3a
+0x08 0x3a
+
+#------------------------------------------------------------------------------
+# SUB (register)
+#------------------------------------------------------------------------------
+# CHECK: subs r1, r2, r3
+
+0xd1 0x1a
+
+
+#------------------------------------------------------------------------------
+# SVC
+#------------------------------------------------------------------------------
+# CHECK: svc #0
+# CHECK: svc #255
+
+0x00 0xdf
+0xff 0xdf
+
+
+#------------------------------------------------------------------------------
+# SXTB/SXTH
+#------------------------------------------------------------------------------
+# CHECK: sxtb r3, r5
+# CHECK: sxth r3, r5
+
+0x6b 0xb2
+0x2b 0xb2
+
+
+#------------------------------------------------------------------------------
+# TST
+#------------------------------------------------------------------------------
+# CHECK: tst r6, r1
+
+0x0e 0x42
+
+
+#------------------------------------------------------------------------------
+# UXTB/UXTH
+#------------------------------------------------------------------------------
+# CHECK: uxtb  r7, r2
+# CHECK: uxth  r1, r4
+
+0xd7 0xb2
+0xa1 0xb2
+
+
+#------------------------------------------------------------------------------
+# WFE/WFI/YIELD
+#------------------------------------------------------------------------------
+# CHECK: wfe
+# CHECK: wfi
+# CHECK: yield
+
+0x20 0xbf
+0x30 0xbf
+0x10 0xbf