[llvm-commits] [compiler-rt] r138332 - in /compiler-rt/trunk/lib/arm: adddf3vfp.S addsf3vfp.S divdf3vfp.S divsf3vfp.S eqdf2vfp.S eqsf2vfp.S extendsfdf2vfp.S fixdfsivfp.S fixsfsivfp.S fixunsdfsivfp.S fixunssfsivfp.S floatsidfvfp.S floatsisfvfp.S floatunssidfvfp.S floatunssisfvfp.S gedf2vfp.S gesf2vfp.S gtdf2vfp.S gtsf2vfp.S ledf2vfp.S lesf2vfp.S ltdf2vfp.S ltsf2vfp.S muldf3vfp.S mulsf3vfp.S nedf2vfp.S negdf2vfp.S negsf2vfp.S nesf2vfp.S subdf3vfp.S subsf3vfp.S truncdfsf2vfp.S unorddf2vfp.S unordsf2vfp.S
Bob Wilson
bob.wilson at apple.com
Tue Aug 23 09:40:18 PDT 2011
Author: bwilson
Date: Tue Aug 23 11:40:18 2011
New Revision: 138332
URL: http://llvm.org/viewvc/llvm-project?rev=138332&view=rev
Log:
Change ARM vfp assembly functions to use unified syntax.
Modified:
compiler-rt/trunk/lib/arm/adddf3vfp.S
compiler-rt/trunk/lib/arm/addsf3vfp.S
compiler-rt/trunk/lib/arm/divdf3vfp.S
compiler-rt/trunk/lib/arm/divsf3vfp.S
compiler-rt/trunk/lib/arm/eqdf2vfp.S
compiler-rt/trunk/lib/arm/eqsf2vfp.S
compiler-rt/trunk/lib/arm/extendsfdf2vfp.S
compiler-rt/trunk/lib/arm/fixdfsivfp.S
compiler-rt/trunk/lib/arm/fixsfsivfp.S
compiler-rt/trunk/lib/arm/fixunsdfsivfp.S
compiler-rt/trunk/lib/arm/fixunssfsivfp.S
compiler-rt/trunk/lib/arm/floatsidfvfp.S
compiler-rt/trunk/lib/arm/floatsisfvfp.S
compiler-rt/trunk/lib/arm/floatunssidfvfp.S
compiler-rt/trunk/lib/arm/floatunssisfvfp.S
compiler-rt/trunk/lib/arm/gedf2vfp.S
compiler-rt/trunk/lib/arm/gesf2vfp.S
compiler-rt/trunk/lib/arm/gtdf2vfp.S
compiler-rt/trunk/lib/arm/gtsf2vfp.S
compiler-rt/trunk/lib/arm/ledf2vfp.S
compiler-rt/trunk/lib/arm/lesf2vfp.S
compiler-rt/trunk/lib/arm/ltdf2vfp.S
compiler-rt/trunk/lib/arm/ltsf2vfp.S
compiler-rt/trunk/lib/arm/muldf3vfp.S
compiler-rt/trunk/lib/arm/mulsf3vfp.S
compiler-rt/trunk/lib/arm/nedf2vfp.S
compiler-rt/trunk/lib/arm/negdf2vfp.S
compiler-rt/trunk/lib/arm/negsf2vfp.S
compiler-rt/trunk/lib/arm/nesf2vfp.S
compiler-rt/trunk/lib/arm/subdf3vfp.S
compiler-rt/trunk/lib/arm/subsf3vfp.S
compiler-rt/trunk/lib/arm/truncdfsf2vfp.S
compiler-rt/trunk/lib/arm/unorddf2vfp.S
compiler-rt/trunk/lib/arm/unordsf2vfp.S
Modified: compiler-rt/trunk/lib/arm/adddf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/adddf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/adddf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/adddf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Adds two double precision floating point numbers using the Darwin
// calling convention where double arguments are passsed in GPR pairs
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
- fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6
- fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7
- faddd d6, d6, d7
- fmrrd r0, r1, d6 // move result back to r0/r1 pair
+ vmov d6, r0, r1 // move first param from r0/r1 pair into d6
+ vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ vadd.f64 d6, d6, d7
+ vmov r0, r1, d6 // move result back to r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/arm/addsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/addsf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/addsf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/addsf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Adds two single precision floating point numbers using the Darwin
// calling convention where single arguments are passsed in GPRs
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__addsf3vfp)
- fmsr s14, r0 // move first param from r0 into float register
- fmsr s15, r1 // move second param from r1 into float register
- fadds s14, s14, s15
- fmrs r0, s14 // move result back to r0
+ vmov s14, r0 // move first param from r0 into float register
+ vmov s15, r1 // move second param from r1 into float register
+ vadd.f32 s14, s14, s15
+ vmov r0, s14 // move result back to r0
bx lr
Modified: compiler-rt/trunk/lib/arm/divdf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/divdf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/divdf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/divdf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Divides two double precision floating point numbers using the Darwin
// calling convention where double arguments are passsed in GPR pairs
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__divdf3vfp)
- fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6
- fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7
- fdivd d5, d6, d7
- fmrrd r0, r1, d5 // move result back to r0/r1 pair
+ vmov d6, r0, r1 // move first param from r0/r1 pair into d6
+ vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ vdiv.f64 d5, d6, d7
+ vmov r0, r1, d5 // move result back to r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/arm/divsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/divsf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/divsf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/divsf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Divides two single precision floating point numbers using the Darwin
// calling convention where single arguments are passsed like 32-bit ints.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__divsf3vfp)
- fmsr s14, r0 // move first param from r0 into float register
- fmsr s15, r1 // move second param from r1 into float register
- fdivs s13, s14, s15
- fmrs r0, s13 // move result back to r0
+ vmov s14, r0 // move first param from r0 into float register
+ vmov s15, r1 // move second param from r1 into float register
+ vdiv.f32 s13, s14, s15
+ vmov r0, s13 // move result back to r0
bx lr
Modified: compiler-rt/trunk/lib/arm/eqdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/eqdf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/eqdf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/eqdf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
moveq r0, #1 // set result register to 1 if equal
movne r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/eqsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/eqsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/eqsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/eqsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
moveq r0, #1 // set result register to 1 if equal
movne r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/extendsfdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/extendsfdf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/extendsfdf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/extendsfdf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a single precision parameter is
// passed in a GPR and a double precision result is returned in R0/R1 pair.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp)
- fmsr s15, r0 // load float register from R0
- fcvtds d7, s15 // convert single to double
- fmrrd r0, r1, d7 // return result in r0/r1 pair
+ vmov s15, r0 // load float register from R0
+ vcvt.f64.f32 d7, s15 // convert single to double
+ vmov r0, r1, d7 // return result in r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/arm/fixdfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixdfsivfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/fixdfsivfp.S (original)
+++ compiler-rt/trunk/lib/arm/fixdfsivfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a double precision parameter is
// passed in GPR register pair.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp)
- fmdrr d7, r0, r1 // load double register from R0/R1
- ftosizd s15, d7 // convert double to 32-bit int into s15
- fmrs r0, s15 // move s15 to result register
+ vmov d7, r0, r1 // load double register from R0/R1
+ vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/fixsfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixsfsivfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/fixsfsivfp.S (original)
+++ compiler-rt/trunk/lib/arm/fixsfsivfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a single precision parameter is
// passed in a GPR..
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__fixsfsivfp)
- fmsr s15, r0 // load float register from R0
- ftosizs s15, s15 // convert single to 32-bit int into s15
- fmrs r0, s15 // move s15 to result register
+ vmov s15, r0 // load float register from R0
+ vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/fixunsdfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixunsdfsivfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/fixunsdfsivfp.S (original)
+++ compiler-rt/trunk/lib/arm/fixunsdfsivfp.S Tue Aug 23 11:40:18 2011
@@ -17,9 +17,10 @@
// Uses Darwin calling convention where a double precision parameter is
// passed in GPR register pair.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp)
- fmdrr d7, r0, r1 // load double register from R0/R1
- ftouizd s15, d7 // convert double to 32-bit int into s15
- fmrs r0, s15 // move s15 to result register
+ vmov d7, r0, r1 // load double register from R0/R1
+ vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/fixunssfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixunssfsivfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/fixunssfsivfp.S (original)
+++ compiler-rt/trunk/lib/arm/fixunssfsivfp.S Tue Aug 23 11:40:18 2011
@@ -17,9 +17,10 @@
// Uses Darwin calling convention where a single precision parameter is
// passed in a GPR..
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp)
- fmsr s15, r0 // load float register from R0
- ftouizs s15, s15 // convert single to 32-bit unsigned into s15
- fmrs r0, s15 // move s15 to result register
+ vmov s15, r0 // load float register from R0
+ vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/floatsidfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatsidfvfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/floatsidfvfp.S (original)
+++ compiler-rt/trunk/lib/arm/floatsidfvfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a double precision result is
// return in GPR register pair.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp)
- fmsr s15, r0 // move int to float register s15
- fsitod d7, s15 // convert 32-bit int in s15 to double in d7
- fmrrd r0, r1, d7 // move d7 to result register pair r0/r1
+ vmov s15, r0 // move int to float register s15
+ vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
+ vmov r0, r1, d7 // move d7 to result register pair r0/r1
bx lr
Modified: compiler-rt/trunk/lib/arm/floatsisfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatsisfvfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/floatsisfvfp.S (original)
+++ compiler-rt/trunk/lib/arm/floatsisfvfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a single precision result is
// return in a GPR..
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__floatsisfvfp)
- fmsr s15, r0 // move int to float register s15
- fsitos s15, s15 // convert 32-bit int in s15 to float in s15
- fmrs r0, s15 // move s15 to result register
+ vmov s15, r0 // move int to float register s15
+ vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/floatunssidfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatunssidfvfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/floatunssidfvfp.S (original)
+++ compiler-rt/trunk/lib/arm/floatunssidfvfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a double precision result is
// return in GPR register pair.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
- fmsr s15, r0 // move int to float register s15
- fuitod d7, s15 // convert 32-bit int in s15 to double in d7
- fmrrd r0, r1, d7 // move d7 to result register pair r0/r1
+ vmov s15, r0 // move int to float register s15
+ vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
+ vmov r0, r1, d7 // move d7 to result register pair r0/r1
bx lr
Modified: compiler-rt/trunk/lib/arm/floatunssisfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatunssisfvfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/floatunssisfvfp.S (original)
+++ compiler-rt/trunk/lib/arm/floatunssisfvfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a single precision result is
// return in a GPR..
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__floatunssisfvfp)
- fmsr s15, r0 // move int to float register s15
- fuitos s15, s15 // convert 32-bit int in s15 to float in s15
- fmrs r0, s15 // move s15 to result register
+ vmov s15, r0 // move int to float register s15
+ vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15
+ vmov r0, s15 // move s15 to result register
bx lr
Modified: compiler-rt/trunk/lib/arm/gedf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gedf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/gedf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/gedf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__gedf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movge r0, #1 // set result register to 1 if greater than or equal
movlt r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/gesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gesf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/gesf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/gesf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__gesf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movge r0, #1 // set result register to 1 if greater than or equal
movlt r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/gtdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gtdf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/gtdf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/gtdf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movgt r0, #1 // set result register to 1 if equal
movle r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/gtsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gtsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/gtsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/gtsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movgt r0, #1 // set result register to 1 if equal
movle r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/ledf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ledf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/ledf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/ledf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__ledf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movls r0, #1 // set result register to 1 if equal
movhi r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/lesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/lesf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/lesf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/lesf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__lesf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movls r0, #1 // set result register to 1 if equal
movhi r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/ltdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ltdf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/ltdf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/ltdf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movmi r0, #1 // set result register to 1 if equal
movpl r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/ltsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ltsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/ltsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/ltsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movmi r0, #1 // set result register to 1 if equal
movpl r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/muldf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/muldf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/muldf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/muldf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Multiplies two double precision floating point numbers using the Darwin
// calling convention where double arguments are passsed in GPR pairs
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__muldf3vfp)
- fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6
- fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7
- fmuld d6, d6, d7
- fmrrd r0, r1, d6 // move result back to r0/r1 pair
+ vmov d6, r0, r1 // move first param from r0/r1 pair into d6
+ vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ vmul.f64 d6, d6, d7
+ vmov r0, r1, d6 // move result back to r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/arm/mulsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/mulsf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/mulsf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/mulsf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Multiplies two single precision floating point numbers using the Darwin
// calling convention where single arguments are passsed like 32-bit ints.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__mulsf3vfp)
- fmsr s14, r0 // move first param from r0 into float register
- fmsr s15, r1 // move second param from r1 into float register
- fmuls s13, s14, s15
- fmrs r0, s13 // move result back to r0
+ vmov s14, r0 // move first param from r0 into float register
+ vmov s15, r1 // move second param from r1 into float register
+ vmul.f32 s13, s14, s15
+ vmov r0, s13 // move result back to r0
bx lr
Modified: compiler-rt/trunk/lib/arm/nedf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/nedf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/nedf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/nedf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movne r0, #1 // set result register to 0 if unequal
moveq r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/negdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/negdf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/negdf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/negdf2vfp.S Tue Aug 23 11:40:18 2011
@@ -15,6 +15,7 @@
// Returns the negation a double precision floating point numbers using the
// Darwin calling convention where double arguments are passsed in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__negdf2vfp)
eor r1, r1, #-2147483648 // flip sign bit on double in r0/r1 pair
Modified: compiler-rt/trunk/lib/arm/negsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/negsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/negsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/negsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -15,6 +15,7 @@
// Returns the negation of a single precision floating point numbers using the
// Darwin calling convention where single arguments are passsed like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__negsf2vfp)
eor r0, r0, #-2147483648 // flip sign bit on float in r0
Modified: compiler-rt/trunk/lib/arm/nesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/nesf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/nesf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/nesf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__nesf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movne r0, #1 // set result register to 1 if unequal
moveq r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/subdf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/subdf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/subdf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/subdf3vfp.S Tue Aug 23 11:40:18 2011
@@ -15,10 +15,11 @@
// Returns difference between two double precision floating point numbers using
// the Darwin calling convention where double arguments are passsed in GPR pairs
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__subdf3vfp)
- fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6
- fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7
- fsubd d6, d6, d7
- fmrrd r0, r1, d6 // move result back to r0/r1 pair
+ vmov d6, r0, r1 // move first param from r0/r1 pair into d6
+ vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ vsub.f64 d6, d6, d7
+ vmov r0, r1, d6 // move result back to r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/arm/subsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/subsf3vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/subsf3vfp.S (original)
+++ compiler-rt/trunk/lib/arm/subsf3vfp.S Tue Aug 23 11:40:18 2011
@@ -16,10 +16,11 @@
// using the Darwin calling convention where single arguments are passsed
// like 32-bit ints.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__subsf3vfp)
- fmsr s14, r0 // move first param from r0 into float register
- fmsr s15, r1 // move second param from r1 into float register
- fsubs s14, s14, s15
- fmrs r0, s14 // move result back to r0
+ vmov s14, r0 // move first param from r0 into float register
+ vmov s15, r1 // move second param from r1 into float register
+ vsub.f32 s14, s14, s15
+ vmov r0, s14 // move result back to r0
bx lr
Modified: compiler-rt/trunk/lib/arm/truncdfsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/truncdfsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/truncdfsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/truncdfsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,9 +16,10 @@
// Uses Darwin calling convention where a double precision parameter is
// passed in a R0/R1 pair and a signle precision result is returned in R0.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp)
- fmdrr d7, r0, r1 // load double from r0/r1 pair
- fcvtsd s15, d7 // convert double to single (trucate precision)
- fmrs r0, s15 // return result in r0
+ vmov d7, r0, r1 // load double from r0/r1 pair
+ vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
+ vmov r0, s15 // return result in r0
bx lr
Modified: compiler-rt/trunk/lib/arm/unorddf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/unorddf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/unorddf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/unorddf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where double precision arguments are passsed
// like in GPR pairs.
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp)
- fmdrr d6, r0, r1 // load r0/r1 pair in double register
- fmdrr d7, r2, r3 // load r2/r3 pair in double register
- fcmpd d6, d7
- fmstat
+ vmov d6, r0, r1 // load r0/r1 pair in double register
+ vmov d7, r2, r3 // load r2/r3 pair in double register
+ vcmp.f64 d6, d7
+ vmrs apsr_nzcv, fpscr
movvs r0, #1 // set result register to 1 if "overflow" (any NaNs)
movvc r0, #0
bx lr
Modified: compiler-rt/trunk/lib/arm/unordsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/unordsf2vfp.S?rev=138332&r1=138331&r2=138332&view=diff
==============================================================================
--- compiler-rt/trunk/lib/arm/unordsf2vfp.S (original)
+++ compiler-rt/trunk/lib/arm/unordsf2vfp.S Tue Aug 23 11:40:18 2011
@@ -16,12 +16,13 @@
// Uses Darwin calling convention where single precision arguments are passsed
// like 32-bit ints
//
+ .syntax unified
.align 2
DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp)
- fmsr s14, r0 // move from GPR 0 to float register
- fmsr s15, r1 // move from GPR 1 to float register
- fcmps s14, s15
- fmstat
+ vmov s14, r0 // move from GPR 0 to float register
+ vmov s15, r1 // move from GPR 1 to float register
+ vcmp.f32 s14, s15
+ vmrs apsr_nzcv, fpscr
movvs r0, #1 // set result register to 1 if "overflow" (any NaNs)
movvc r0, #0
bx lr
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