[llvm-commits] [llvm] r138251 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassembler.cpp test/MC/Disassembler/ARM/neon.txt

[Owen Anderson]

Author: resistor
Date: Mon Aug 22 13:22:06 2011
New Revision: 138251

URL: http://llvm.org/viewvc/llvm-project?rev=138251&view=rev
Log:
Correct writeback handling of duplicating VLD instructions.  Discovered by randomized testing.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=138251&r1=138250&r2=138251&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Aug 22 13:22:06 2011
@@ -1992,7 +1992,7 @@
   if (regs == 2) {
     CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder));
   }
-  if (Rm == 0xD) {
+  if (Rm != 0xF) {
     CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
   }
 
@@ -2023,7 +2023,7 @@
 
   CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
-  if (Rm == 0xD) {
+  if (Rm != 0xF) {
     CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
   }
 
@@ -2052,7 +2052,7 @@
   CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
-  if (Rm == 0xD) {
+  if (Rm != 0xF) {
     CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
   }
 
@@ -2097,7 +2097,7 @@
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
   CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder));
-  if (Rm == 0xD) {
+  if (Rm != 0xF) {
     CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
   }
 

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon.txt?rev=138251&r1=138250&r2=138251&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon.txt Mon Aug 22 13:22:06 2011
@@ -1845,3 +1845,7 @@
 # CHECK: vst4.16	{d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
 0x4f 0x1b 0xc0 0xf4
 # CHECK: vst4.32	{d17[0], d19[0], d21[0], d23[0]}, [r0]
+
+0x0 0xc 0xa0 0xf4
+# CHECK: vld1.8	{d0[]}, [r0], r0
+