[llvm-commits] [llvm] r138164 - /llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Fri Aug 19 19:17:45 2011
New Revision: 138164

URL: http://llvm.org/viewvc/llvm-project?rev=138164&view=rev
Log:
Add <imp-def> operands to QQ and QQQQ stack loads.

This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=138164&r1=138163&r2=138164&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Aug 19 19:17:45 2011
@@ -930,7 +930,8 @@
         MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI);
         MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI);
         MIB = AddDReg(MIB, DestReg, ARM::dsub_2, RegState::Define, TRI);
-              AddDReg(MIB, DestReg, ARM::dsub_3, RegState::Define, TRI);
+        MIB = AddDReg(MIB, DestReg, ARM::dsub_3, RegState::Define, TRI);
+        MIB.addReg(DestReg, RegState::Define | RegState::Implicit);
       }
     } else
       llvm_unreachable("Unknown reg class!");
@@ -948,7 +949,8 @@
       MIB = AddDReg(MIB, DestReg, ARM::dsub_4, RegState::Define, TRI);
       MIB = AddDReg(MIB, DestReg, ARM::dsub_5, RegState::Define, TRI);
       MIB = AddDReg(MIB, DestReg, ARM::dsub_6, RegState::Define, TRI);
-      AddDReg(MIB, DestReg, ARM::dsub_7, RegState::Define, TRI);
+      MIB = AddDReg(MIB, DestReg, ARM::dsub_7, RegState::Define, TRI);
+      MIB.addReg(DestReg, RegState::Define | RegState::Implicit);
     } else
       llvm_unreachable("Unknown reg class!");
     break;