[llvm-commits] [llvm] r138116 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb.td test/CodeGen/ARM/avoid-cpsr-rmw.ll test/CodeGen/Thumb2/thumb2-mls.ll test/CodeGen/Thumb2/thumb2-mul.ll

[Jim Grosbach]

Author: grosbach
Date: Fri Aug 19 17:19:48 2011
New Revision: 138116

URL: http://llvm.org/viewvc/llvm-project?rev=138116&view=rev
Log:
Update tests.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
    llvm/trunk/test/CodeGen/ARM/avoid-cpsr-rmw.ll
    llvm/trunk/test/CodeGen/Thumb2/thumb2-mls.ll
    llvm/trunk/test/CodeGen/Thumb2/thumb2-mul.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=138116&r1=138115&r2=138116&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Fri Aug 19 17:19:48 2011
@@ -1114,6 +1114,10 @@
                "rsb", "\t$Rd, $Rn, #0",
                [(set tGPR:$Rd, (ineg tGPR:$Rn))]>;
 
+def : InstAlias<"neg${s}${p} $Rd, $Rm",
+                (tRSB tGPR:$Rd, CPSR, tGPR:$Rm, pred:$p)>,
+        Requires<[IsThumb]>;
+
 // Subtract with carry register
 let Uses = [CPSR] in
 def tSBC :                      // A8.6.151

Modified: llvm/trunk/test/CodeGen/ARM/avoid-cpsr-rmw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/avoid-cpsr-rmw.ll?rev=138116&r1=138115&r2=138116&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/avoid-cpsr-rmw.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/avoid-cpsr-rmw.ll Fri Aug 19 17:19:48 2011
@@ -6,9 +6,9 @@
 define i32 @t(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone {
  entry:
 ; CHECK: t:
-; CHECK: muls r2, r3, r2
+; CHECK: muls r2, r2, r3
 ; CHECK-NEXT: mul  r0, r0, r1
-; CHECK-NEXT: muls r0, r2, r0
+; CHECK-NEXT: muls r0, r0, r2
   %0 = mul nsw i32 %a, %b
   %1 = mul nsw i32 %c, %d
   %2 = mul nsw i32 %0, %1

Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-mls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-mls.ll?rev=138116&r1=138115&r2=138116&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-mls.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-mls.ll Fri Aug 19 17:19:48 2011
@@ -15,5 +15,5 @@
     ret i32 %tmp2
 }
 ; CHECK: f2:
-; CHECK: 	muls	r0, r1
+; CHECK: 	muls	r0, r0, r1
 

Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-mul.ll?rev=138116&r1=138115&r2=138116&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-mul.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-mul.ll Fri Aug 19 17:19:48 2011
@@ -2,7 +2,7 @@
 
 define i32 @f1(i32 %a, i32 %b, i32 %c) {
 ; CHECK: f1:
-; CHECK: muls r0, r1
+; CHECK: muls r0, r0, r1
     %tmp = mul i32 %a, %b
     ret i32 %tmp
 }