[llvm-commits] [llvm] r137892 - in /llvm/trunk/lib/Target/Mips: MipsISelLowering.cpp MipsInstrFormats.td MipsInstrInfo.td

[Bruno Cardoso Lopes]

> src has nothing to do with the fifth operand of INS. It is the bit
> field newly defined in class ExtIns ( bits<5> src), which gets bound
> to field rs defined in class FR.

This is exactly why I'm asking. "bits<5> src" gets bounded to "rs",
but "CPURegs:$rs" is also getting bounded to it. There's something
wrong here, cause why would you wanna bind another field to "rs" if
you already have CPURegs:$rs? Got it?

+def INS : ExtIns<4, "ins",
+                 (ins CPURegs:$rs, uimm16:$pos, uimm16:$size, CPURegs:$src),
+                 [(set CPURegs:$rt,
+                   (MipsIns CPURegs:$rs, immZExt5:$pos, immZExt5:$size,
+                    CPURegs:$src))],
+                 NoItinerary>;


-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc