[llvm-commits] [llvm] r137889 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb-instructions.s test/MC/ARM/thumb-diagnostics.s
Jim Grosbach
grosbach at apple.com
Wed Aug 17 15:49:10 PDT 2011
Author: grosbach
Date: Wed Aug 17 17:49:09 2011
New Revision: 137889
URL: http://llvm.org/viewvc/llvm-project?rev=137889&view=rev
Log:
Thumb assembly parsing and encoding for ASR.
Modified:
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
llvm/trunk/test/MC/ARM/thumb-diagnostics.s
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=137889&r1=137888&r2=137889&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Aug 17 17:49:09 2011
@@ -2693,7 +2693,7 @@
// Next, determine if we have a carry setting bit. We explicitly ignore all
// the instructions we know end in 's'.
if (Mnemonic.endswith("s") &&
- !(Mnemonic == "asrs" || Mnemonic == "cps" || Mnemonic == "mls" ||
+ !(Mnemonic == "cps" || Mnemonic == "mls" ||
Mnemonic == "mrs" || Mnemonic == "smmls" || Mnemonic == "vabs" ||
Mnemonic == "vcls" || Mnemonic == "vmls" || Mnemonic == "vmrs" ||
Mnemonic == "vnmls" || Mnemonic == "vqabs" || Mnemonic == "vrecps" ||
Modified: llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb-instructions.s?rev=137889&r1=137888&r2=137889&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb-instructions.s Wed Aug 17 17:49:09 2011
@@ -56,3 +56,23 @@
@ CHECK: adr r2, _baz @ encoding: [A,0xa2]
@ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
+
+
+ at ------------------------------------------------------------------------------
+@ ASR (immediate)
+ at ------------------------------------------------------------------------------
+ asrs r2, r3, #32
+ asrs r2, r3, #5
+ asrs r2, r3, #1
+
+@ CHECK: asrs r2, r3, #32 @ encoding: [0x1a,0x10]
+@ CHECK: asrs r2, r3, #5 @ encoding: [0x5a,0x11]
+@ CHECK: asrs r2, r3, #1 @ encoding: [0x5a,0x10]
+
+
+ at ------------------------------------------------------------------------------
+@ ASR (register)
+ at ------------------------------------------------------------------------------
+ asrs r5, r2
+
+@ CHECK: asrs r5, r2 @ encoding: [0x15,0x41]
Modified: llvm/trunk/test/MC/ARM/thumb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-diagnostics.s?rev=137889&r1=137888&r2=137889&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-diagnostics.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-diagnostics.s Wed Aug 17 17:49:09 2011
@@ -18,3 +18,14 @@
@ CHECK-ERRORS: error: instruction variant requires ARMv6 or later
@ CHECK-ERRORS: mov r2, r3
@ CHECK-ERRORS: ^
+
+
+@ Out of range immediates for ASR instruction.
+ asrs r2, r3, #33
+ asrs r2, r3, #0
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: asrs r2, r3, #33
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: asrs r2, r3, #0
+@ CHECK-ERRORS: ^
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